WM8351CGEB/RV WOLFSON [Wolfson Microelectronics plc], WM8351CGEB/RV Datasheet - Page 42
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WM8351CGEB/RV
Manufacturer Part Number
WM8351CGEB/RV
Description
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8351CGEBRV.pdf
(330 pages)
- Current page: 42 of 330
- Download datasheet (4Mb)
WM8351
11.4 3-WIRE SERIAL CONTROL MODE
Figure 30 3-Wire Serial Control Interface
w
In 3-wire control mode, a control word consists of 24 bits. The first bit is the read/write bit (R/W),
which is followed by 7 address bits (A6 to A0) that determine which control register is accessed. The
remaining 16 bits (B15 to B0) are data bits, corresponding to the 16 bits in each control register.
In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDATA pin. A rising edge
on CSB latches in a complete control word consisting of the last 24 bits.
In Write operations (R/W=0), all SDATA bits are driven by the controlling device.
In Read operations (R/W=1), the SDATA pin is driven by the controlling device to clock in the register
address, after which the WM8351 drives the SDATA pin to output the applicable data bits.
Similarly to 2-wire control mode, the WM8351 transmits logic 1 by tri-stating the SDATA pin, rather
than pulling it high. An external pull-up resistor is required to pull the SDATA line high so that the logic
1 can be recognised by the master.
The 3-wire control mode timing is illustrated in Figure 30.
The 3-wire control interface uses the CSB, SCLK and SDATA pins, which are referenced to the digital
buffer supply, DBVDD. (In 3-wire mode, CSB is provided on GPIO7.)
3-wire control mode is selected by setting SPI_3WIRE = 1 and SPI_4WIRE = 0.
PD, April 2012, Rev 4.5
Production Data
42
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