WM8351CGEB/RV WOLFSON [Wolfson Microelectronics plc], WM8351CGEB/RV Datasheet - Page 247

• Manufacturer Part Number: WM8351CGEB/RV
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

REGISTER
Production Data
Register 33h DAC Digital Volume R
Register 35h DAC LR Rate
REGISTER
Register 36h DAC Clock Control
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REGISTER
ADDRESS
ADDRESS
ADDRESS
DAC Digital
DAC Clock
R53 (35h)
R51 (33h)
R54 (36h)
Volume R
DAC LR
Control
Rate
BIT
10:0
BIT
BIT
11
7:0
2:0
15
4
8
DACLRC_RATE[10:0] 000_0100_0000 Determines the number of bit clocks per LRC
DAC_CLKDIV[2:0]
DACR_VOL[7:0] 1100_0000 Right DAC digital volume control:
DACCLK_POL
DACR_ENA
DACLRC_ENA
DAC_VU
LABEL
LABEL
LABEL
DEFAULT
DEFAULT
0
0
000
DEFAULT
0
0
Right DAC enable
0 = disabled
1 = enabled
DAC left and DAC right volume do not update until a
1 is written to either DAC_VU register bit.
0000_0000 = Digital mute
0000_0001 = -71.625dB
0000_0010 = -71.25dB
… (0.375dB steps)
1100_000 = 0dB
DAC Clock Polarity
0 = Normal
1 = Inverted
DAC Sample rate divider
000 = SYSCLK / 1.0
001 = SYSCLK / 1.5
010 = SYSCLK / 2
011 = SYSCLK / 3
100 = SYSCLK / 4
101 = SYSCLK / 5.5
110 = SYSCLK / 6
111 = Reserved
Enables DAC LRC generation in Master mode
0 = disabled
1 = enabled
phase (when enabled)
00000000000 = invalid
...
00000000111 = invalid
00000001000 = 8 BCPS
…
11111111111 = 2047 BCPS
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD, April 2012, Rev 4.5
REFER TO
REFER TO
REFER TO
WM8351
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