WM9701A WOLFSON Wolfson Microelectronics plc, WM9701A Datasheet
WM9701A
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WM9701A Summary of contents
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... DESCRIPTION The WM9701A is a high-quality stereo audio codec compliant with the Intel AC’97 Rev 1.03 specification. Forming the analogue component PC audio solution, it performs full-duplex 18-bit codec functions at 48 ksamples/s and offers excellent audio quality with high SNR. In addition, the WM9701A provides a comprehensive analogue mixer with 4 sets of stereo inputs, plus phone, 2 microphone, and PC-beep inputs ...
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... Operating temperature range Storage temperature Package body temperature (soldering 10 seconds) Package body temperature (soldering 2 minutes) Note: 1. The digital supply voltage (DVDD) must always be less than or equal to the analogue supply voltage (AVDD). WOLFSON MICROELECTRONICS LTD. ORDERING INFORMATION DEVICE WM9701ACFT LINEOUTR 35 LINEOUTL ...
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... C to +70 C, unless otherwise stated. A SYMBOL TEST CONDITIONS Minimum input impedance = 10k Into 10kohm load CAP2 VREF VREFOUT AVDD = 5V AVDD = 5V AVDD = 3.3V WM9701A MIN TYP MAX -10% 3.3 to 5.0 +10% -10% 3.3 to 5.0 +10 -0 MIN TYP MAX AVSS -0.3 ...
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... WM9701A Test Conditions: AVDD = 5V, GND = 0V, DVDD = 3.3V, GND = 0V, T DAC Circuit Specifications 48kHz Sampling SNR A-weighted (Note 1) Full scale output voltage THD Frequency response Transition band Stop band Out of band rejection Spurious tone reduction PSRR ADC Circuit Specifications 48kHz Sampling SNR A-weighted (Note 1) ...
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... WOLFSON MICROELECTRONICS LTD. SLOT 1 SLOT 2 SYNC WRITE DON’T DATA PR4 TO 0X20 CARE t S2_PDOWN SYMBOL t S2_PDOWN t RST_LOW SYMBOL t RST_LOW t RST2CLK WM9701A +70 C, unless otherwise stated. All A MIN TYP MAX 1.0 t RST2CLK MIN TYP MAX 1.0 162.8 PD Rev 3.2 January 2001 UNIT s UNIT ...
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... WM9701A WARM RESET BIT_CLK Figure 3 Warm Reset Timing SYNC active high pulse width SYNC inactive to BIT_CLK startup delay CLOCK SPECIFICATIONS BIT_CLK Figure 4 Clock Specifications (50pF External Load) Note: Worst case duty cycle restricted to 40/60. PARAMETER BIT_CLK frequency BIT_CLK period BIT_CLK output jitter ...
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... MIN TYP MAX 15.0 5.0 MIN TYP MAX 2 6 CLK 2 6 CLK 2 6 SYNC 2 6 SYNC 2 6 DIN 2 6 DIN 2 6 DOUT 2 6 DOUT PD Rev 3.2 January 2001 WM9701A UNIT ns ns UNIT ...
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... WM9701A PIN DESCRIPTION PIN NAME DVDD1 Supply 1 2 XTLIN Digital input XTLOUT Digital output 3 4 DVSS1 Supply SDATAOUT Digital input 5 6 BITCLK Digital output DVSS2 Supply 7 8 SDATAIN Digital output DVDD2 Supply 9 10 SYNC Digital input RESETB Digital input 11 12 PCBEEP ...
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... Therefore, for the DAC, 16-bit words will be downloaded into the Codec from the controller, along with padding make the 16-bit word up to 20-bit length. In this case, WM9701A will process the 16-bit word along with 0 padding bits in the 2 LSB locations (to make 18-bit). At the ADC output, WM9701A will provide an 18-bit word, again with 0s in the two LSB locations (20-bit). The AC’ ...
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... If a slot is “tagged” invalid the responsibility of the source of the data, (WM9701A for the input stream, AC’97 controller for the output stream); to stuff all bit positions with 0s during that slot’s active time. ...
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... Within slot 0 the first bit is a global bit (SDATA_OUT slot 0, bit 15) which flags the validity for the entire audio frame. If the “Valid Frame” bit this indicates that the current audio frame contains at least one time slot of valid data. The next 12-bit positions sampled by WM9701A indicate which of the corresponding 12 time slots contain valid data. ...
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... Bit(18:12) Bit(11:0) The first bit (MSB) sampled by WM9701A indicates whether the current control transaction is a read or write operation. The following 7 bit positions communicate the targeted control register address. The trailing 12 bit positions within the slot are reserved and must be stuffed with 0s by the AC’97 controller ...
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... Slot special reserved time slot containing 16-bits, which are used for AC-link protocol infrastructure. Within slot 0 the first bit is a global bit (SDATA_IN slot 0, bit 15) which flags whether WM9701A is in the “Codec Ready” state or not. If the “Codec Ready” bit this indicates that WM9701A is not ready for normal operation. This condition is normal following the desertion of power on reset for example, while WM9701A’ ...
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... The status data port delivers 16-bit control register read data. Bit(19:4) Bit(3:0) If slot 2 is tagged “invalid” by WM9701A, then the entire slot will be stuffed with 0s by WM9701A. SLOT 3: PCM RECORD LEFT CHANNEL Audio input frame slot 3 is the left channel output of WM9701A’s input Mux, post-ADC. ...
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... The AC’97 controller should also drive SYNC and SDATA_OUT low after programming WM9701A to this low power, “halted” mode. Once WM9701A has been instructed to halt BIT_CLK, a special “wake up” protocol must be used to bring the AC-link to the active mode since normal audio output and input frames can not be communicated in the absence of BIT_CLK ...
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... Support for the MSB of the level is not provided by WM9701A. If the MSB is written to then WM9701A detects when that bit is set and sets all 4 LSBs to 1s. Example: If the driver writes a 1xxxxx WM9701A interprets that as x11111. It will also respond when read with x11111 rather than 1xxxxx, the value written to it ...
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... RECORD SOURCE Mic CD in (R) Video in (R) Aux in (R) Line in (R) Stereo mix (R) Mono mix Phone MUTE GX3...GX0 1111 0000 xxxxx WM9701A FUNCTION 0dB attenuation 45dB attenuation dB attenuation FUNCTION +12dB gain 0dB gain -34.5dB gain - dB gain SL2-SL0 LEFT RECORD SOURCE 0 Mic ...
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... Below is a summary of each bit and its function. Only the MIX, MS and LPBK bits are supported by WM9701A. The MS bit controls the Mic selector. The LPBK bit enables loop back of the ADC output to the DAC input without involving the AC-link, allowing for full system performance measurements. ...
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... Figure 12 illustrates one example procedure complete power down of WM9701A. From normal operation sequential writes to the power down Register are performed to power down WM9701A a piece at a time. After everything has been shut off, a final write (of PR4) can be executed to shut down the WM9701A’s digital interface (AC-link). ...
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... Figure 13 illustrates a state when all the mixers should work with the static volume settings that are contained in their associated registers. This is used when the user could be playing a CD (or external LINE_IN source) through WM9701A to the speakers but have most of the system in low power mode. The procedure for this follows the previous except that the analogue mixer is never shut down ...
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... REV 7 WM9701A ID6 ID5 ID4 ID3 ID2 ID1 X X MR4 MR3 MR2 MR1 X X MM4 MM3 MM2 MM1 X X PV3 PV2 PV2 PV0 X ...
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... WM9701A RECOMMENDED EXTERNAL COMPONENTS MIXER INPUTS AC-LINK Notes C19 and C21 should be as close to WM9701A as possible. 2. AGND and DGND should be connected as close to WM9701A as possible. Figure 14 External Components Diagram WOLFSON MICROELECTRONICS LTD. DVDD 1 DVDD1 9 C1 DVDD2 C2 4 DVSS1 7 DVSS2 DGND 12 C5 ...
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... Reference de-coupling capacitors for ADC, DAC, Mixer and CAP2 references. Ceramic type or similar. Output AC coupling caps to remove VREF DC level from outputs. Optional capacitors for better crystal frequency stability. AC’97 master clock frequency. A bias resistor is not required, but if connected will not affect operation if value is large (above 1M ). WM9701A PD Rev 3.2 January 2001 23 ...
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... WM9701A PACKAGE DIMENSIONS FT: 48 PIN TQFP ( 1.4 mm Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 1.35 1. 0.17 0.22 c 0.09 ----- D 9.00 BSC D 7.00 BSC 1 E 9.00 BSC E 7.00 BSC 1 e 0.50 BSC L 0.45 0. 3.5 Tolerances of Form and Position ccc 0.08 REF: JEDEC.95, MS-026 NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS. ...