LM3S101-IRN20 ETC2 [List of Unclassifed Manufacturers], LM3S101-IRN20 Datasheet - Page 246
![no-image](/images/no-image-200.jpg)
LM3S101-IRN20
Manufacturer Part Number
LM3S101-IRN20
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S101-IRN20.pdf
(300 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S101-IRN20C0X
Manufacturer:
LUMINARYM
Quantity:
20 000
- Current page: 246 of 300
- Download datasheet (2Mb)
Synchronous Serial Interface (SSI)
246
Reset
Reset
Type
Type
Bit/Field
SSI Raw Interrupt Status (SSIRIS)
Offset 0x018
31:4
3
2
1
0
RO
RO
31
15
0
0
Register 7: SSI Raw Interrupt Status (SSIRIS), offset 0x018
The SSIRIS register is the raw interrupt status register. On a read, this register gives the current
raw status value of the corresponding interrupt prior to masking. A write has no effect.
RO
RO
30
14
0
0
reserved
RORRIS
RXRIS
RTRIS
TXRIS
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
27
11
0
0
RO
RO
RO
RO
RO
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
1
0
0
0
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the transmit FIFO is half full or less, when set.
Indicates that the receive FIFO is half full or more, when set.
SSI Receive Time-Out Raw Interrupt Status
Indicates that the receive time-out has occurred, when set.
SSI Receive Overrun Raw Interrupt Status
Indicates that the receive FIFO has overflowed, when set.
SSI Transmit FIFO Raw Interrupt Status
SSI Receive FIFO Raw Interrupt Status
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
TXRIS
RO
RO
19
0
3
1
RXRIS
RO
RO
18
0
2
0
October 5, 2006
RTRIS
RO
RO
17
0
1
0
RORRIS
RO
RO
16
0
0
0
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