LM3S101-IRN20 ETC2 [List of Unclassifed Manufacturers], LM3S101-IRN20 Datasheet - Page 160

• Manufacturer Part Number: LM3S101-IRN20
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

General-Purpose Timers
160
Reset
Reset
Type
Type
Bit/Field
31:16
15:0
GPTM TimerB Match (GPTMTBMATCHR)
Offset 0x034
R/W
RO
15
31
0
0
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034
This register is used in 32-bit Real-Time Clock mode and 16-bit PWM and Input Edge Count
modes.
R/W
RO
14
30
0
0
reserved
TBMRL
Name
R/W
RO
29
13
0
0
R/W
RO
12
28
0
0
Type
R/W
RO
R/W
RO
11
27
0
0
R/W
RO
10
26
0
0
0xFFFF
Reset
0
R/W
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM TimerB Match Register Low
When configured for PWM mode, this value along with
GPTMTBILR, determines the duty cycle of the output PWM
signal.
When configured for Edge Count mode, this value along with
GPTMTBILR, determines how many edge events are counted.
The total number of edge events counted is equal to the value
in GPTMTBILR minus this value.
R/W
RO
24
0
8
0
reserved
TBMRL
R/W
RO
23
7
0
0
R/W
RO
22
6
0
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
R/W
RO
19
3
0
0
R/W
RO
18
2
0
0
October 5, 2006
R/W
RO
17
1
0
0
R/W
RO
16
0
0
0