MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 481
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MC9S12E32CFU
Manufacturer Part Number
MC9S12E32CFU
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12E32CFU.pdf
(606 pages)
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Freescale Semiconductor
CAPMOD
DBGBRK
Field
1:0
3
DBG Breakpoint Enable Bit — The DBGBRK bit controls whether the debugger will request a breakpoint based
on comparator A and B to the CPU upon completion of a tracing session. Please refer to
“Breakpoints,” for further details.
0 CPU break request not enabled
1 CPU break request enabled
Capture Mode Field — See
automatically inhibit redundant entries into capture memory. In detail mode, the debugger is storing address and
data for all cycles except program fetch (P) and free (f) cycles. In profile mode, the debugger is returning the
address of the last instruction executed by the CPU on each access of trace buffer address. Refer to
Section 16.4.2.6, “Capture
Table 16-3. DBGC1 Field Descriptions (continued)
Modes,” for more information.
Table 16-4
CAPMOD
MC9S12E128 Data Sheet, Rev. 1.07
Table 16-4. CAPMOD Encoding
00
01
10
11
for capture mode field definitions. In LOOP1 mode, the debugger will
Description
Description
PROFILE
LOOP1
DETAIL
Normal
Chapter 16 Debug Module (DBGV1)
Section 16.4.3,
481
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