MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 336

• Manufacturer Part Number: MC9S12E32CFU
• Description: HCS12 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.3.2.7
Read and write anytime.
11.3.2.8
Read anytime. This register cannot be modified after the WP bit is set.
336
Module Base + 0x0006
Module Base + 0x0007
FFLAG[3:0]
QSMP[3:0]
6, 4, 2, 0
Reset
Reset
Field
Field
7–0
W
W
R
R
Fault x Pin Flag — This flag is set after the required number of samples have been detected after a rising edge
on the FAULTx pin. Writing a logic one to FFLAGx clears it. Writing a logic zero has no effect. The fault protection
is enabled when FPINEx is set even when the PWMs are not enabled; therefore, a fault will be latched in,
requiring to be cleared in order to prevent an interrupt.
0 No fault on the FAULTx pin.
1 Fault on the FAULTx pin.
Note: Clearing FFLAGx satisfies pending FFLAGx CPU interrupt requests.
where x is 0, 1, 2 and 3.
Fault x Qualifying Samples — This field indicates the number of consecutive samples taken at the FAULTx pin
to determine if a fault is detected. The first sample is qualified after two bus cycles from the time the fault is
present and each sample after that is taken every four bus cycles. See
where x is 0, 1, 2 and 3.
PMF Fault Status Register (PMFFSTA)
PMF Fault Qualifying Samples Register (PMFQSMP)
0
0
0
7
7
QSMP3
Figure 11-11. PMF Fault Qualifying Samples Register (PMFQSMP))
= Unimplemented or Reserved
FFLAG3
0
0
6
6
Figure 11-10. PMF Fault Flag Register (PMFFSTA)
Table 11-9. PMFQSMP Field Descriptions
Table 11-8. PMFFSTA Field Descriptions
MC9S12E128 Data Sheet, Rev. 1.07
0
0
0
5
5
QSMP2
FFLAG2
0
0
4
4
Description
Description
0
0
0
3
3
QSMP1
FFLAG1
Table
0
0
2
2
11-10.
Freescale Semiconductor
0
0
0
1
1
QSMP0
FFLAG0
0
0
0
0