MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 445

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MC9S12E32CFU

Manufacturer Part Number
MC9S12E32CFU
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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14.5
This subsection describes how VREG3V3V2 controls the reset of the MCU.The reset values of registers
and signals are provided in
are listed in
14.5.1
During chip power-up the digital core may not work if its supply voltage V
deassertion level (V
kept high until V
continues the start-up sequence. The power-on reset is active in all operation modes of VREG3V3V2.
14.5.2
For details on low-voltage reset see
14.6
This subsection describes all interrupts originated by VREG3V3V2.
The interrupt vectors requested by VREG3V3V2 are listed in
priorities are defined at MCU level.
14.6.1
In FPM VREG3V3V2 monitors the input voltage V
status bit LVDS is set to 1. Vice versa, LVDS is reset to 0 when V
interrupt, indicated by flag LVIF = 1, is triggered by any change of the status bit LVDS if interrupt enable
bit LVIE = 1.
Freescale Semiconductor
Resets
Interrupts
Power-On Reset
Low-Voltage Reset
LVI — Low-Voltage Interrupt
Table
Low Voltage Interrupt (LVI)
On entering the reduced-power mode, the LVIF is not cleared by the
VREG3V3V2.
Power-on reset
Low-voltage reset
DD
14-4.
PORD
Interrupt Source
exceeds V
Reset Source
). Therefore, signal POR which forces the other blocks of the device into reset is
Section 14.3, “Memory Map and Register
PORD
Table 14-5. VREG3V3V2 — Interrupt Vectors
Table 14-4. VREG3V3V2 — Reset Sources
Section 14.4.6, “LVR — Low-Voltage
. Then POR becomes low and the reset generator of the device
MC9S12E128 Data Sheet, Rev. 1.07
Always active
Available only in full-performance mode
LVIE = 1; Available only in full-performance mode
NOTE
DDA
. Whenever V
Local Enable
Chapter 14 Dual Output Voltage Regulator (VREG3V3V2)
Local Enable
Table
DDA
14-5. Vector addresses and interrupt
Definition”. Possible reset sources
DDA
rises above level V
drops below level V
DD
Reset”.
is below the POR
LVID
. An
LVIA
the
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