MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 324

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MC9S12E32CFU

Manufacturer Part Number
MC9S12E32CFU
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.1.2
Care must be exercised when using this module in the modes listed in
in their inactive states in stop mode, and optionally under WAIT and freeze modes. PWM outputs will be
reactivated (assuming they were active to begin with) when these modes are exited.
11.1.3
Figure 11-1
The Mux/Swap/Current Sense block is tightly integrated with the dead time insertion block . This detail
is shown in
324
Figure
Modes of Operation
Block Diagrams
provides an overview of the PMF module.
It is possible to have both channels of a complementary pair to be high. For
example, if the TOPNEGA (negative polarity for PWM0), BOTNEGA
(negative polarity for PWM1), MASK0, and MASK1 bits are set, both the
PWM complementary outputs of generator A will be high. See
Section 11.3.2.2, “PMF Configure 1 Register (PMFCFG1)”
description of TOPNEG and BOTNEG bits, and
Configure 2 Register (PMFCFG2)”
MSK1 bits.
Freeze
Mode
Stop
Wait
11-2.
Table 11-1. Modes When PWM Operation is Restricted
MC9S12E128 Data Sheet, Rev. 1.07
PWM outputs are disabled as a function of the PMFFRZ bit.
PWM outputs are disabled as a function of the PMFWAI bit.
NOTE
for the description of the MSK0 and
PWM outputs are disabled
Description
Section 11.3.2.3, “PMF
Table
11-1. PWM outputs are placed
for the
Freescale Semiconductor

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