DSPIC30F6010A MICROCHIP [Microchip Technology], DSPIC30F6010A Datasheet - Page 145

• Manufacturer Part Number: DSPIC30F6010A
• Description: High-Performance, 16-bit Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

20.7.1.3
The following configuration items are required to
achieve a 1 Msps conversion rate.
• Comply with conditions provided in
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable sequential sampling by clearing the
• Enable at least two sample and hold channels by
• Write the SMPI<3:0> control bits in the ADCON2
• Configure the A/D clock period to be:
• Configure the sampling time to be 2 T
• Select at least two channels per analog input pin
20.7.2
The following configuration items are required to achieve
a 750 ksps conversion rate. This configuration assumes
that a single analog input is to be sampled.
• Comply with conditions provided in
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable one sample and hold channel by setting
• Write the SMPI<3:0> control bits in the ADCON2
• Configure the A/D clock period to be:
• Configure the sampling time to be 2 T
• Select one channel per analog input pin by writing
© 2011 Microchip Technology Inc.
the recommended circuit shown in
enable the auto-convert option
control bit in the ADCON1 register
SIMSAM bit in the ADCON1 register
writing the CHPS<1:0> control bits in the
ADCON2 register
register for the desired number of conversions
between interrupts. At a minimum, set
SMPI<3:0> = 0001 since at least two sample and
hold channels should be enabled
by writing to the ADCS<5:0> control bits in the
ADCON3 register
writing: SAMC<4:0> = 00010
by writing to the ADCHS register
the recommended circuit shown in
enable the auto-convert option
control bit in the ADCON1 register
CHPS<1:0> = 00 in the ADCON2 register
register for the desired number of conversions
between interrupts
by writing to the ADCS<5:0> control bits in the
ADCON3 register
SAMC<4:0> = 00010
(12 + 2) X 750,000
750 ksps CONFIGURATION
GUIDELINE
12 x 1,000,000
1 Msps Configuration Items
1
1
REF
REF
+ and V
+ and V
= 83.33 ns
= 95.24 ns
REF
REF
- pins following
Figure 20-2
- pins following
Figure 20-1
Figure 20-2
Figure 20-1
AD
AD
by writing:
by
dsPIC30F6010A/6015
20.7.3
The configuration for 600 ksps operation is dependent
on whether a single input pin is to be sampled or
whether multiple pins will be sampled.
20.7.3.1
When performing conversions at 600 ksps for a single
analog input, at least two sample and hold channels
must be enabled. The analog input multiplexer must be
configured so that the same input pin is connected to
both sample and hold channels. The A/D converts the
value held on one S/H channel, while the second S/H
channel acquires a new input sample.
20.7.3.2
The A/D converter can also be used to sample multiple
analog inputs using multiple sample and hold channels.
In this case, the total 600 ksps conversion rate is
divided among the different input signals. For example,
four inputs can be sampled at a rate of 150 ksps for
each signal or two inputs can be sampled at a rate of
300 ksps for each signal. Sequential sampling must be
used in this configuration to allow adequate sampling
time on each input.
20.7.3.3
The following configuration items are required to
achieve a 600 ksps conversion rate.
• Comply with conditions provided in
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable sequential sampling by clearing the
• Enable at least two sample and hold channels by
• Write the SMPI<3:0> control bits in the ADCON2
• Configure the A/D clock period to be :
• Configure the sampling time to be 2 T
• Select at least two channels per analog input pin
to the ADCHS register
the recommended circuit shown in
enable the auto-convert option
control bit in the ADCON1 register
SIMSAM bit in the ADCON1 register
writing the CHPS<1:0> control bits in the ADCON2
register
register for the desired number of conversions
between interrupts. At a minimum, set
SMPI<3:0> = 0001 since at least two sample and
hold channels should be enabled
by writing to the ADCS<5:0> control bits in the
ADCON3 register
writing: SAMC<4:0> = 00010
by writing to the ADCHS register
600 ksps CONFIGURATION
GUIDELINE
12 x 600,000
Single Analog Input
Multiple Analog Input
600 ksps Configuration Items
1
REF
+ and V
= 138.89 ns
REF
DS70150E-page 145
- pins following
Figure 20-2
Figure 20-1
AD
by