ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 52

• Manufacturer Part Number: ATMEGA8L
• Description: 8-bit AVR with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

52
ATmega8(L)
Consider the clock period starting shortly after the first falling edge of the system clock.
The latch is closed when the clock is low, and goes transparent when the clock is high,
as indicated by the shaded region of the “SYNC LATCH” signal. The signal value is
latched when the system clock goes low. It is clocked into the PINxn Register at the suc-
ceeding positive clock edge. As indicated by the two arrows t
signal transition on the pin will be delayed between ½ and 1-½ system clock period
depending upon the time of assertion.
When reading back a software assigned pin value, a nop instruction must be inserted as
indicated in Figure 24. The out instruction sets the “SYNC LATCH” signal at the positive
edge of the clock. In this case, the delay t
period.
Figure 24. Synchronization when Reading a Software Assigned Pin Value
INSTRUCTIONS
SYSTEM CLK
SYNC LATCH
PINxn
r16
r17
out PORTx, r16
pd
through the synchronizer is 1 system clock
0x00
nop
t
pd
0xFF
in r17, PINx
pd,max
and t
pd,min
2486M–AVR–12/03
, a single
0xFF