ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 130

• Manufacturer Part Number: ATMEGA8L
• Description: 8-bit AVR with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

USART
Overview
130
ATmega8(L)
The Universal Synchronous and Asynchronous serial Receiver and Transmitter
(USART) is a highly-flexible serial communication device. The main features are:
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A simplified block diagram of the USART Transmitter is shown in Figure 61. CPU acces-
sible I/O Registers and I/O pins are shown in bold.
Figure 61. USART Block Diagram
Note:
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Databits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
1. Refer to “Pin Configurations” on page 2, Table 30 on page 62, and Table 29 on page
62 for USART pin placement.
UCSRA
TRANSMIT SHIFT REGISTER
RECEIVE SHIFT REGISTER
BAUD RATE GENERATOR
UDR (Transmit)
UDR (Receive)
UBRR[H:L]
(1)
UCSRB
GENERATOR
SYNC LOGIC
RECOVERY
RECOVERY
CHECKER
PARITY
PARITY
CLOCK
DATA
OSC
Clock Generator
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
Transmitter
PIN
PIN
PIN
RX
TX
Receiver
UCSRC
2486M–AVR–12/03
XCK
RxD
TxD