ATMEGA8L ATMEL [ATMEL Corporation], ATMEGA8L Datasheet - Page 31

• Manufacturer Part Number: ATMEGA8L
• Description: 8-bit AVR with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Power Management
and Sleep Modes
MCU Control Register –
MCUCR
2486M–AVR–12/03
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
To enter any of the five sleep modes, the SE bit in MCUCR must be written to logic one
and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the
MCUCR Register select which sleep mode (Idle, ADC Noise Reduction, Power-down,
Power-save, or Standby) will be activated by the SLEEP instruction. See Table 13 for a
summary. If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU
wakes up. The MCU is then halted for four cycles in addition to the start-up time, it exe-
cutes the interrupt routine, and resumes execution from the instruction following SLEEP.
The contents of the Register File and SRAM are unaltered when the device wakes up
from sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from
the Reset Vector.
Note that the Extended Standby mode present in many other AVR MCUs has been
removed in the ATmega8, as the TOSC and XTAL inputs share the same physical pins.
Figure 10 on page 23 presents the different clock systems in the ATmega8, and their
distribution. The figure is helpful in selecting an appropriate sleep mode.
The MCU Control Register contains control bits for power management.
• Bit 7 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is
the programmer’s purpose, it is recommended to set the Sleep Enable (SE) bit just
before the execution of the SLEEP instruction.
• Bits 6..4 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in Table 13.
Table 13. Sleep Mode Select
Note:
Bit
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1. Standby mode is only available with external crystals or resonators.
R/W
SE
7
0
SM1
0
0
1
1
0
0
1
SM2
R/W
6
0
SM1
R/W
5
0
SM0
0
1
0
1
0
1
0
SM0
R/W
4
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
ISC11
R/W
3
0
(1)
ISC10
R/W
2
0
ISC01
ATmega8(L)
R/W
1
0
ISC00
R/W
0
0
MCUCR
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