HYB18T512160AC-37 INFINEON [Infineon Technologies AG], HYB18T512160AC-37 Datasheet - Page 89

• Manufacturer Part Number: HYB18T512160AC-37
• Description: 512-Mbit Double-Data-Rate-Two SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

Figure 73
Note: DQS, DQS signals must be monotonic between
Data Sheet
Slew Rate Definition Tangent Diagram for
V REF(dc)
V IH (ac)
V
V IL (dc)
V IL (ac)
V SS
V
IH (dc)
DDQ
CK,DQS
CK,DQS
max
max
min
min
Dc to VREF
Reference Loads, Setup & Hold Timing Definition and Slew Rate Derating
Dc to VREF
region
region
Hold Slew Rate
Hold Slew Rate
Falling Signal
Rising Signal
t IS ,t DS
=
=
Tangent
V
line
Tangent line [VIH(dc)min - VREF(dc)]
89
Tangent line [VREF(dc) - VIL(dc)max]
IL(dc)max
t
IH
(
Delta TR
512-Mbit Double-Data-Rate-Two SDRAM
t
DH
t
HYB18T512[400/800/160]A[C/F]–[3.7/5]
and
IH ,t DH
)
Delta TR
Delta TF
V
IH(dc)min
slew rate
Nominal
Tangent
t
IS
line
,t
DS
.
t IH ,t DH
Delta TF
slew rate
Nominal
09112003-SDM9-IQ3P
Rev. 1.13, 2004-05