HYB18T512160AC-37 INFINEON [Infineon Technologies AG], HYB18T512160AC-37 Datasheet - Page 21

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HYB18T512160AC-37

Manufacturer Part Number
HYB18T512160AC-37
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
2
2.1
Figure 7
Note: This Simplified State Diagram is intended to
Data Sheet
provide a floorplan of the possible state
transitions and thecommands to control them. In
particular situations involving more than one
Functional Description
Simplified State Diagram
Simplified State Diagram
Active PD
CKEL
CKEL
Write
WL + BL/2 + WR
Initialization
Writing_AP
Sequence
Precharge
Writing
PD
PD_entry
CKEH
Activating
CKEH
PD_entry
t
RCD
Precharging
Refreshing
21
Active
Bank
Auto
Idle
512-Mbit Double-Data-Rate-Two SDRAM
t
t
RFC
RP
HYB18T512[400/800/160]A[C/F]–[3.7/5]
bank, enabling / disabling on-die termination,
Power-Down entry / exit - among other things -
are not captured in full detail.
MRS
t
MRD
RL + BL/2 + t
Reading_AP
Reading
Refresh
MRS or
Setting
EMRS
Self
Functional Description
09112003-SDM9-IQ3P
RTP
CKEL
Automatic Sequence
Command Sequence
Read
Rev. 1.13, 2004-05
MPFT0010

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