HYB18L256160B QIMONDA [Qimonda AG], HYB18L256160B Datasheet - Page 27

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HYB18L256160B

Manufacturer Part Number
HYB18L256160B
Description
DRAMs for Mobile Applications 256-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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Data Sheet
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
2.4.5.5
READ to PRECHARGE
A READ burst may be followed by, or truncated with a PRECHARGE command to the same bank, provided that Auto
Precharge was not activated. This is shown in
Figure
22.
The PRECHARGE command should be issued x clock cycles before the clock edge at which the last desired data element is
valid, where x equals the CAS latency for READ bursts minus 1. Following the PRECHARGE command, a subsequent ACTIVE
t
command to the same bank cannot be issued until
is met. Please note that part of the row precharge time is hidden during
RP
the access of the last data elements.
In the case of a READ being executed to completion, a PRECHARGE command issued at the optimum time (as described
above) provides the same operation that would result from the same READ burst with Auto Precharge enabled. The
disadvantage of the PRECHARGE command is that it requires that the command and address busses be available at the
appropriate time to issue the command. The advantage of the PRECHARGE command is that it can be used to truncate bursts.
FIGURE 22
READ to PRECHARGE Timing
Rev. 1.73, 2006-09
27
01302004-CZ2R-J9SE

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