HYB18L256160B QIMONDA [Qimonda AG], HYB18L256160B Datasheet - Page 18

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HYB18L256160B

Manufacturer Part Number
HYB18L256160B
Description
DRAMs for Mobile Applications 256-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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2.4.4
Before any READ or WRITE commands can be issued to a
bank within the Mobile-RAM, a row in that bank must be
“opened” (activated). This is accomplished via the ACTIVE
command and addresses A0 - A12, BA0 and BA1 (see
Figure
row to be activated. After opening a row (issuing an ACTIVE
command), a READ or WRITE command may be issued to
that row, subject to the
ACTIVE command to a different row in the same bank can
only be issued after the previous active row has been “closed”
(precharged).
The minimum time interval between successive ACTIVE
commands to the same bank is defined by
ACTIVE command to another bank can be issued while the
first bank is being accessed, which results in a reduction of
total row-access overhead. The minimum time interval
between successive ACTIVE commands to different banks is
defined by
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
Rev. 1.73, 2006-09
01302004-CZ2R-J9SE
Parameter
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE bank A to ACTIVE bank B delay
no. of clock cycles = specified delay / clock period; round up to next integer.
9), which decode and select both the bank and the
t
RRD
.
ACTIVE
t
RCD
specification. A subsequent
t
RC
. A subsequent
t
t
t
RC
RCD
RRD
Symbol
18
67
19
15
min.
Timing Parameters for ACTIVE Command
- 7.5
max.
HY[B/E]18L256160B[C/F]L-7.5
ns
ns
ns
Bank Activate Timings
Units
256-Mbit Mobile-RAM
ACTIVE command
FIGURE 10
TABLE 11
FIGURE 9
1)
1)
1)
Data Sheet
Note

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