HYB18L256160B QIMONDA [Qimonda AG], HYB18L256160B Datasheet - Page 26

• Manufacturer Part Number: HYB18L256160B
• Description: DRAMs for Mobile Applications 256-Mbit Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

Data Sheet
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
2.4.5.4
READ to WRITE
A READ burst may be followed by or truncated with a WRITE command. The WRITE command can be performed to the same
or a different (active) bank. Care must be taken to avoid bus contention on the DQs; therefore it is recommended that the DQs
are held in High-Z state for a minimum of 1 clock cycle. This can be achieved by either delaying the WRITE command, or
suppressing the data-out from the READ by pulling DQM HIGH two clock cycles prior to the WRITE command, as shown in
Figure
21. With the registration of the WRITE command, DQM acts as a write mask: when asserted HIGH, input data will be
masked and no write will be performed.
FIGURE 21
READ to WRITE Timing
Rev. 1.73, 2006-09
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01302004-CZ2R-J9SE