HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 369
HD64F7050
Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD64F7050.pdf
(841 pages)
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11.3
11.3.1
APC pulse output is enabled by designating multiplex pins for APC pulse output with the pin
function controller (PFC), and setting the corresponding bits to 1 in the pulse output port control
register (POPCR).
When general register 2A (GR2A) in the advanced timer unit (ATU) subsequently generates a
compare-match signal, 1 is output from the pins set to 1 by bits 7 to 0 in POPCR. When general
register 2B (GR2B) generates a compare-match signal, 0 is output from the pins set to 1 by bits 15
to 8 in POPCR.
0 is output from the output-enabled state until the first compare-match occurs.
The advanced pulse controller output operation is shown in figure 11.2.
(PULS0 to PULS7)
APC output pins
Operation
Overview
Figure 11.2 Advanced Pulse Controller Output Operation
Port function
selection
CR
Upper 8 bits
Lower 8 bits
of POPCR
of POPCR
Reset signal
Set signal
Section 11 Advanced Pulse Controller (APC)
Rev. 5.00 Jan 06, 2006 page 349 of 818
Compare-match
signal
Compare-match
signal
REJ09B0273-0500
GR2B
GR2A
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