HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 225

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Block Diagram of Channel 5: Figure 10.6 shows a block diagram of ATU channel 5.
Legend:
TSTR:
TMDR:
TCR5:
TIOR5A: Timer I/O control register 5A (8 bits)
TSRDL: Timer status register DL (8 bits)
TIERDL: Timer interrupt enable register DL (8 bits)
TCNT5: Free-running counter 5 (16 bits)
GR5:
Interrupts:
OVI5: Overflow interrupt 5
IMI5: Input capture/compare-match interrupt 5
Note: * TMDR is used by channels 3 to 5.
1
0
TCLKA
TCLKB
/(m·2
TSTR
m
n
n
)
5
TSRDH and TIERDH are used by channels 4 and 5.
32
Timer start register (16 bits)
Timer mode register (8 bits)
Timer control register 5 (8 bits)
General register 5 (16 bits)
Clock selection
Figure 10.6 Block Diagram of Channel 5
Module data bus
Control logic
Rev. 5.00 Jan 06, 2006 page 205 of 818
Section 10 Advanced Timer Unit (ATU)
Comparator
REJ09B0273-0500
OVI5
IMI5A
IMI5B
TIOA5
TIOB5