PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 24

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
3
3.1
3.1.1
Electrical Interface
The IOM-2 interface is a 4-wire interface with two data lines (DD and DU, programmable
open drain or push-pull), a data clock line (DCL input/output) and a frame sync signal
(FSC input/output). The data clock is by default equal to twice the data rate (“Double
Rate”). However, DCL may be set equal to the data rate (“Single Rate”) by programming.
In standalone configuration the clock signal is always “Double Rate”.
In terminal applications, the bit rate on the interface is normally 768 Kbit/s, in line card
applications it is 2048 Kbit/s (for details, see IOM-2 Interface Reference Guide).
However, the data rate may be different (between 16 Kbit/s and 4.096 Mbit/s and the
DCL rate correspondingly between 16 kHz and 4.096 MHz), since the interface can be
considered as a general purpose TDM (Time-Division Multiplex) highway.
The total number of time-slots on the interface is not explicitly programmed: instead, the
FSC signal (at repetition rate 8 kHz) always marks the TDM physical frame beginning.
See Figure 7.
Figure 7
DCL
FSC (8 kHz)
Interfaces and Memory Organization
Interfaces
IOM
®
-2 Interface
Marks the beginning of the physical frame on DU and DD. The first
Bits on DU/DD are clocked out with the rising edge of DCL and
latched in with the falling edge of DCL. Frequency 16 kHz to
4.096 MHz.
bit in the frame is output after the rising edge of FSC. The first bit in
the frame is latched in with the first falling edge after FSC has gone
“high” if CRS = 1, or after the second edge (at 3/4) if CRS = 0.
24
Interfaces and Memory Organization
Data Sheet 1998-07-01
PSB 7238