PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 121

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

CCR0
PU
ITF
C32
CRL
RCRC
XCRC
Channel Configuration Register 0 CCR0
Semiconductor Group
Power down (0) or power up (1).
Interframe Time-Fill
If ‘0’, idle (continuous logical 1) is transmitted when no frame is sent;
continuous flag sequences, otherwise.
Has no meaning in transparent mode (where “idle” is always sent in the
absence of data).
A ‘1’ selects the 32-bit CCITT-32 frame check sequence, as opposed to the
16-bit frame check sequence.
Has no meaning in transparent mode.
CRC Reset Level
Defines the initialization for the internal receive and transmit CRC
generators: A ‘0’ initializes the generators to (FFFF)FFFF
(0000)0000
Receive CRC On/Off
When ‘1’, the received CRC checksum is written to RFIFO. The checksum,
consisting of last 2 (or 4) bytes in the received frame, is followed in the
RFIFO by the status information byte (copied into RSTA register).
Independently of RCRC the received checksum will be checked for
correctness. RBCL/H include the CRC byte(s).
Has no meaning in transparent mode.
When ‘1’, the CRC checksum in transmit direction is not generated
automatically. It has to be written as the last 2 or 4 bytes in XFIFO.
Has no meaning in transparent mode.
Power Up
Enable CRC-32
Transmit CRC On/Off
Bit 7
PU
H
ITF
. Has no meaning in transparent mode.
C32
CRL
121
RCRC
Read/Write
XCRC
Register Description
Data Sheet 1998-07-01
H
RMSB
, a ‘1’ to
Address 26
PSB 7238
XMSB
Bit 0
H