MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 79

• Manufacturer Part Number: MC68HC912D60A
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

5.5.2 RAM Mapping
INITRM — Initialization of Internal RAM Position Register
MC68HC912D60A — Rev 3.0
MOTOROLA
RESET:
RAM15
Bit 7
0
RAM14
6
0
MMSWAI — Memory Mapping Interface Stop in Wait Control
The MC68HC912D60A has 2K byte of fully static RAM that is used for
storing instructions, variables, and temporary data during program
execution. After reset, RAM addressing begins at location $0000 but can
be assigned to any 2K byte boundary within the standard 64K byte
address space. Mapping of internal RAM is controlled by five bits in the
INITRM register.
After reset, the first 512 bytes of RAM have their access inhibited by the
presence of the register address space. After initial MCU configuration,
it is recommended to map the register space at location $0800.
RAM[15:11] — Internal RAM map position
This bit controls access to the memory mapping interface when in
Wait mode.
Normal modes: write anytime; special modes: write never. Read
anytime.
0 = Memory mapping interface continues to function during Wait
mode.
1 = Memory mapping interface access is shut down during Wait
mode.
These bits specify the upper five bits of the 16-bit RAM address.
Normal modes: write once; special modes: write anytime. Read
anytime.
Freescale Semiconductor, Inc.
For More Information On This Product,
Operating Modes and Resource Mapping
RAM13
5
0
Go to: www.freescale.com
RAM12
4
0
RAM11
3
0
Operating Modes and Resource Mapping
2
0
0
1
0
0
Internal Resource Mapping
Bit 0
0
0
Technical Data
$0010
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