MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 53

• Manufacturer Part Number: MC68HC912D60A
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

3.6.1 Port A
3.6.2 Port B
MC68HC912D60A — Rev 3.0
MOTOROLA
which can be read and written at any time, and, with the exception of port
AD0, port AD1 (available only in 112TQFP), PE[1:0], RxCAN and
TxCAN, a data direction register which controls the direction of each pin.
After reset all general purpose I/O pins are configured as input.
Port A pins are used for address and data in expanded modes. In single
chip modes, the pins can be used as I/O. The port data register is not in
the address map during expanded and peripheral mode operation.
When it is in the map, port A can be read or written at anytime.
Register DDRA determines whether each port A pin is an input or output.
DDRA is not in the address map during expanded and peripheral mode
operation. Setting a bit in DDRA makes the corresponding bit in port A
an output; clearing a bit in DDRA makes the corresponding bit in port A
an input. The default reset state of DDRA is all zeros.
When the PUPA bit in the PUCR register is set, all port A input pins are
pulled-up internally by an active pull-up device. This bit has no effect if
the port is being used in expanded modes as the pull-ups are inactive.
Setting the RDPA bit in register RDRIV causes all port A outputs to have
reduced drive level. RDRIV can be written once after reset. RDRIV is not
in the address map in peripheral mode. Refer to
Input/Output.
Port B pins are used for address and data in expanded modes. In single
chip modes, the pins can be used as I/O. The port data register is not in
the address map during expanded and peripheral mode operation.
When it is in the map, port B can be read or written at anytime.
Register DDRB determines whether each port B pin is an input or output.
DDRB is not in the address map during expanded and peripheral mode
operation. Setting a bit in DDRB makes the corresponding bit in port B
an output; clearing a bit in DDRB makes the corresponding bit in port B
an input. The default reset state of DDRB is all zeros.
Freescale Semiconductor, Inc.
For More Information On This Product,
Pinout and Signal Descriptions
Go to: www.freescale.com
Pinout and Signal Descriptions
Bus Control and
Technical Data
Port Signals
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