MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 272
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MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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Serial Communications Interface
Technical Data
272
BYTE 1
BYTE 1
READ SCS1
READ SCDR
PE — Receiver Parity Error Bit
SCRF = 1
This clearable, read-only bit is set when the SCI detects a parity error
in incoming data. PE generates a PE CPU interrupt request if the
PEIE bit in SCC3 is also set. Clear the PE bit by reading SCS1 with
PE set and then reading the SCDR. Reset clears the PE bit.
Freescale Semiconductor, Inc.
BYTE 1
OR = 0
Figure 15-13. Flag Clearing Sequence
Serial Communications Interface Module (SCI)
For More Information On This Product,
1 = Parity error detected
0 = No parity error detected
READ SCDR
READ SCS1
DELAYED FLAG CLEARING SEQUENCE
NORMAL FLAG CLEARING SEQUENCE
BYTE 2
BYTE 2
SCRF = 1
Go to: www.freescale.com
BYTE 1
OR = 0
READ SCDR
READ SCS1
SCRF = 1
BYTE 2
OR = 0
BYTE 3
BYTE 3
READ SCDR
READ SCDR
READ SCS1
READ SCS1
SCRF = 1
SCRF = 1
BYTE 3
BYTE 3
OR = 1
OR = 0
MC68HC908AB32
BYTE 4
BYTE 4
MOTOROLA
—
Rev. 1.0
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