MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 114

• Manufacturer Part Number: MC68HC908AB32
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
8.4.1 External Pin Reset
8.4.2 Active Resets from Internal Sources
Technical Data
114
All of these resets produce the vector $FFFE–FFFF ($FEFE–FEFF in
monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter (see
external reset does not. Each of the resets sets a corresponding bit in
the SIM reset status register (SRSR). (See
Pulling the asynchronous RST pin low halts all processing. The PIN bit
of the SIM reset status register (SRSR) is set as long as RST is held low
for a minimum of 67 CGMXCLK cycles, assuming that neither the POR
nor the LVI was the source of the reset. See
Figure 8-4
All internal reset sources actively pull the RST pin low for 32 CGMXCLK
cycles to allow for resetting of external peripherals. The internal reset
signal IRST continues to be asserted for an additional 32 cycles. See
Figure
opcode, COP timeout, LVI, or POR. See
POR resets, the SIM cycles through 4096 CGMXCLK cycles, during
which the SIM forces the RST pin low. The internal reset signal then
follows the sequence from the falling edge of RST as shown in
Figure
CGMOUT
Freescale Semiconductor, Inc.
RST
IAB
For More Information On This Product,
Reset Type
All others
POR/LVI
8-5. An internal reset can be caused by an illegal address, illegal
8-5.
PC
System Integration Module (SIM)
shows the relative timing.
Go to: www.freescale.com
Figure 8-4. External Reset Timing
Table 8-2. PIN Bit Set Timing
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
Figure
67 (64 + 3)
8.8 SIM
Table 8-2
8.5 SIM
MC68HC908AB32
8-6. Note that for LVI or
VECT H VECT L
Registers.)
Counter), but an
for details.
MOTOROLA
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Rev. 1.0