MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 140

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MC68HC908AB32

Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Clock Generator Module (CGM)
9.4.3 Base Clock Selector Circuit
9.4.4 CGM External Connections
Technical Data
140
This circuit is used to select either the crystal clock, CGMXCLK, or the
VCO clock, CGMVCLK, as the source of the base clock, CGMOUT. The
two input clocks go through a transition control circuit that waits up to
three CGMXCLK cycles and three CGMVCLK cycles to change from
one clock source to the other. During this time, CGMOUT is held in
stasis. The output of the transition control circuit is then divided by two
to correct the duty cycle. Therefore, the bus clock frequency, which is
one-half of the base clock frequency, is one-fourth the frequency of the
selected clock (CGMXCLK or CGMVCLK).
The BCS bit in the PLL control register (PCTL) selects which clock drives
CGMOUT. The VCO clock cannot be selected as the base clock source
if the PLL is not turned on. The PLL cannot be turned off if the VCO clock
is selected. The PLL cannot be turned on or off simultaneously with the
selection or deselection of the VCO clock. The VCO clock also cannot
be selected as the base clock source if the factor L is programmed to a
zero. This value would set up a condition inconsistent with the operation
of the PLL, so that the PLL would be disabled and the crystal clock would
be forced as the source of the base clock.
In its typical configuration, the CGM requires seven external
components. Five of these are for the crystal oscillator and two are for
the PLL.
The crystal oscillator is normally connected in a Pierce oscillator
configuration, as shown in
representation of the internal components and may not represent actual
circuitry. The oscillator configuration uses five components:
Freescale Semiconductor, Inc.
For More Information On This Product,
A zero value for N is interpreted exactly the same as a value of
one.
A zero value for L disables the PLL and prevents its selection as
the source for the base clock. (See
Circuit)
Clock Generator Module (CGM)
Go to: www.freescale.com
Figure
9-3. This figure shows only the logical
9.4.3 Base Clock Selector
MC68HC908AB32
MOTOROLA
Rev. 1.0

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