UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 51

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6.14.13 G
General Purpose registers 0 and 1 have write access in Start-up, Restart mode and Flash mode only to allow general
bits to be written to the UJA1061.
Table 14 GP0 - General Purpose register 0 (address 10) bit description
Note
1. During power-up, the bits of the General Purpose register 0 (GP0) will be loaded with a ‘Device Identification Code’
Table 15 GP1 - General Purpose register 1 (address 11) bit description
6.14.14 G
General Purpose Feedback registers 0 and 1 allow the general bits to be read from the UJA1061.
2004 Mar 22
11 to 0
11 to 0
Low speed CAN/LIN system basis chip
15, 14
15, 14
BIT
consisting of the SBC type and SBC version. Bit 11 of GP0 will reflect a logic 0 indicating the content of this register
to be the ‘Device Identification Code’ after Power-on of the SBC. Once written to this register, bit 11 will be set to a
permanent logic 1 indicating that the device code has been overwritten with application-specific information. Bit 11
cannot be reset any more with software control. Bit 11 will be cleared again with the next Power-on condition at
pin BAT42 with reloading the device code into GP0.
BIT
13
12
13
12
ENERAL
ENERAL
A1, A0
RRS
RO
GP0
RO
GP0
SYMBOL
SYMBOL
A1, A0
RRS
P
P
URPOSE REGISTERS
URPOSE
register address
Read Register Select
Read Only
General Purpose bits
register address
Read Register Select
Read Only
General Purpose bits
DESCRIPTION
DESCRIPTION
F
EEDBACK REGISTERS
VALUE
VALUE
10
11
1
0
1
0
1
0
1
0
1
0
1
0
51
read the general purpose feedback register 0 (GPF0)
read the General Purpose Feedback register 0 (GPF0)
read the System Configuration Feedback register (SCF)
read the register selected by RRS without writing to the
General Purpose register 0 (GP0)
read the register selected by RRS and write to the General
Purpose register 0 (GP0)
the relevant General Purpose bit has been set; note 1
the relevant General Purpose bit has been cleared; note 1
select General Purpose register 1
read the General Purpose Feedback register 1 (GPF1)
read the Physical Layer Control Feedback register 1
(PLCF)
read the register selected by RRS without writing to the
General Purpose register 1 (GP1)
read the register selected by RRS and write to the general
purpose register (GP1)
the relevant General Purpose bit has been set
the relevant General Purpose bit has been cleared
FUNCTION
FUNCTION
Objective specification
UJA1061