LPC47M172_07 SMSC [SMSC Corporation], LPC47M172_07 Datasheet - Page 90

• Manufacturer Part Number: LPC47M172_07
• Description: Advanced I/O Controller with Motherboard GLUE Logic
• Manufacturer: SMSC [SMSC Corporation]

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note 1:
Note 2:
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
DATA PORT
STATUS
PORT
CONTROL
PORT
EPP ADDR
PORT
EPP DATA
PORT 0
EPP DATA
PORT 1
EPP DATA
PORT 2
EPP DATA
PORT 3
The Parallel Port configuration registers are summarized in Table 11.2 in the “Configuration” section. The
Parallel Port logical device configuration registers (0xF0 and 0xF1) are defined in Table 11.11.
The parallel port also incorporates SMSC’s ChiProtect circuitry, which prevents possible damage to the
parallel port due to printer power-up.
The functionality of the Parallel Port is achieved through the use of eight addressable ports, with their
associated registers and control gating. The control and data port are read/write by the CPU, the status
port is read/write in the EPP mode. The address map of the Parallel Port is shown below:
DATA PORT
STATUS PORT
CONTROL PORT
EPP ADDR PORT
The bit map of these registers is:
These registers are available in all modes.
These registers are only available in EPP mode.
STROBE AUTOFD
TMOUT
PD0
PD0
PD0
PD0
PD0
PD0
D0
PD1
PD1
PD1
PD1
PD1
PD1
D1
0
BASE ADDRESS + 00H
BASE ADDRESS + 01H
BASE ADDRESS + 02H
BASE ADDRESS + 03H
DATASHEET
nINIT
PD2
PD2
PD2
PD2
PD2
PD2
D2
0
nERR
Page 90
PD3
SLC
PD3
PD3
PD3
PD3
PD3
D3
SLCT
IRQE
PD4
PD4
PD4
PD4
PD4
PD4
EPP DATA PORT 0
EPP DATA PORT 1
EPP DATA PORT 2
EPP DATA PORT 3
D4
PCD
PD5
PD5
PD5
PD5
PD5
PD5
PE
D5
nACK
PD6
PD6
PD6
PD6
PD6
PD6
D6
0
BASE ADDRESS + 04H
BASE ADDRESS + 05H
BASE ADDRESS + 06H
BASE ADDRESS + 07H
nBUSY
PD7
PD7
PD7
PD7
PD7
PD7
D7
0
SMSC LPC47M172
NOTE
1
1
1
2
2
2
2
2