MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 96

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MC68HC705C4ACB

Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Capture/Compare Timer
8.4.6 Output Compare Registers
Technical Data
96
Register Name and Address: Input Capture Register High — $0014
Register Name and Address: Input Capture Register Low — $0015
Register Name and Address: Output Compare Register High — $0016
Register Name and Address: Output Compare Register Low — $0017
When the value of the 16-bit counter matches the value in the read/write
output compare registers shown in
action takes place. Writing to OCRH before writing to OCRL inhibits
timer compares until OCRL is written. Reading or writing to OCRL after
reading the timer status register clears the output compare flag
(OCF).
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 8-12. Output Compare Registers (OCRH and OCRL)
Figure 8-11. Input Capture Registers (ICRH and ICRL)
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Capture/Compare Timer
= Unimplemented
Bit 14
Bit 6
14
6
6
6
Bit 13
Bit 5
13
5
5
5
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
Bit 12
Bit 4
12
4
4
4
Figure
Bit 11
Bit 3
11
3
3
3
8-12, the planned TCMP pin
Bit 10
Bit 2
10
2
2
2
Bit 9
Bit 1
1
9
1
1
MOTOROLA
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0

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