MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 32
MC68HC705C4ACB
Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705C4ACB.pdf
(210 pages)
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General Description
1.7.2.3 External Clock Signal
1.7.3 External Reset Pin (RESET)
1.7.4 External Interrupt Request Pin (IRQ)
1.7.5 Input Capture Pin (TCAP)
Technical Data
32
NOTE:
An external clock from another CMOS-compatible device can drive the
OSC1 input, with the OSC2 pin unconnected, as
The bus frequency (f
the processor clock cycle is two times the f
A logic 0 on the RESET pin forces the MCU to a known startup state. The
RESET pin contains an internal Schmitt trigger as part of its input to
improve noise immunity. See
The IRQ pin is an asynchronous external interrupt pin. The IRQ pin
contains an internal Schmitt trigger as part of its input to improve noise
immunity. See
The TCAP pin is the input capture pin for the on-chip capture/compare
timer. The TCAP pin contains an internal Schmitt trigger as part of its
input to improve noise immunity. See
Timer.
4.3.2 External Interrupt
General Description
OP
Figure 1-11. External Clock
) is one-half the external frequency (f
CMOS CLOCK
EXTERNAL
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
Section 5.
MCU
Section 8. Capture/Compare
(IRQ).
Resets.
OSC
period.
Figure 1-11
OSC
MOTOROLA
shows.
) while
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