MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 24
MC68HC705C4ACB
Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705C4ACB.pdf
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General Description
1.5 Block Diagram
1.6 Pin Assignments
Technical Data
24
IRQ — Interrupt Request Pin Sensitivity Bit
Bits 7–4 and 0 — Not used; always read 0
Bit 2 — Unaffected by reset; reads either 1 or 0
Figure 1-2
The MC68HC705C4A is available in four packages:
The pin assignments for these packages are shown in
Figure
IRQ is set only by reset, but can be cleared by software. This bit can
be written only once.
•
•
•
•
1 = IRQ pin is both negative edge- and level-sensitive.
0 = IRQ pin is negative edge-sensitive only.
40-pin plastic dual in-line package (PDIP)
44-lead plastic-leaded chip carrier (PLCC)
44-pin quad flat pack (QFP)
42-pin shrink dual in-line package (SDIP)
1-4,
shows the structure of the MC68HC705C4A.
Figure
General Description
1-5, and
Figure
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
1-6.
Figure
MOTOROLA
1-3,
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