MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 84
MC68HC705C4ACB
Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705C4ACB.pdf
(210 pages)
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Parallel Input/Output (I/O)
7.6 Port D
Technical Data
84
Address:
Port D is a 7-bit, special-purpose, input-only port that has no data
register. Reading address $0003 returns the logic states of the port D
pins.
Port D shares pins PD5–PD2 with the serial peripheral interface module
(SPI). When the SPI is enabled, PD5–PD2 read as logic 0s. When the
SPI is disabled, reading address $0003 returns the logic states of the
PD5–PD2 pins.
Port D shares pins PD1 and PD0 with the SCI module. When the SCI is
enabled, PD1 and PD0 read as logic 0s. When the SCI is disabled,
reading address $0003 returns the logic states of the PD1 and PD0 pins.
Reset:
Read:
Write:
$0003
Figure 7-10. Port D Fixed Input Register (PORTD)
Bit 7
PD7
Parallel Input/Output (I/O)
= Unimplemented
6
SS
5
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
Unaffected by reset
SCK
4
MOSI
3
MISO
2
TDO
1
MOTOROLA
Bit 0
RDI
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