PIC18F2221 MICROCHIP [Microchip Technology], PIC18F2221 Datasheet - Page 383

• Manufacturer Part Number: PIC18F2221
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

INDEX
A
A/D ................................................................................... 227
Absolute Maximum Ratings ............................................. 327
AC (Timing) Characteristics ............................................. 345
AC Characteristics
Access Bank
ACKSTAT ........................................................................ 195
ACKSTAT Status Flag ..................................................... 195
ADCON0 Register ............................................................ 227
ADCON1 Register ............................................................ 227
ADCON2 Register ............................................................ 227
ADDFSR .......................................................................... 316
ADDLW ............................................................................ 279
ADDULNK ........................................................................ 316
ADDWF ............................................................................ 279
ADDWFC ......................................................................... 280
ADRESH Register ............................................................ 227
ADRESL Register .................................................... 227, 230
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 280
ANDWF ............................................................................ 281
Assembler
Auto-Wake-up on Sync Break Character ......................... 220
B
Bank Select Register (BSR) ............................................... 59
Baud Rate Generator ....................................................... 191
BC .................................................................................... 281
BCF .................................................................................. 282
© 2007 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ....................... 231
Acquisition Requirements ........................................ 232
ADCON0 Register .................................................... 227
ADCON1 Register .................................................... 227
ADCON2 Register .................................................... 227
ADRESH Register ............................................ 227, 230
ADRESL Register .................................................... 227
Analog Port Pins, Configuring .................................. 234
Associated Registers ............................................... 236
Calculating the Minimum Required
Configuring the Module ............................................ 231
Conversion Clock (T
Conversion Requirements ....................................... 364
Conversion Status (GO/DONE Bit) .......................... 230
Conversions ............................................................. 235
Converter Characteristics ........................................ 363
Discharge ................................................................. 235
Operation in Power-Managed Modes ...................... 234
Selecting and Configuring Acquisition Time ............ 233
Special Event Trigger (CCP) .................................... 236
Special Event Trigger (ECCP) ................................. 148
Use of the CCP2 Trigger .......................................... 236
Load Conditions for Device
Parameter Symbology ............................................. 345
Temperature and Voltage Specifications ................. 346
Timing Conditions .................................................... 346
Internal RC Accuracy ............................................... 348
Mapping with Indexed Literal Offset
GO/DONE Bit ........................................................... 230
MPASM Assembler .................................................. 324
Acquisition Time .............................................. 232
Timing Specifications ....................................... 346
Addressing Mode ............................................... 71
AD
) ........................................... 233
Preliminary
BF .................................................................................... 195
BF Status Flag ................................................................. 195
Block Diagrams
BN .................................................................................... 282
BNC ................................................................................. 283
BNN ................................................................................. 283
BNOV .............................................................................. 284
BNZ ................................................................................. 284
BOR. See Brown-out Reset.
BOV ................................................................................. 287
BRA ................................................................................. 285
Break Character (12-Bit) Transmit
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 44
PIC18F4321 FAMILY
A/D ........................................................................... 230
Analog Input Model .................................................. 231
Baud Rate Generator .............................................. 191
Capture Mode Operation ......................................... 141
Comparator Analog Input Model .............................. 241
Comparator I/O Operating Modes ........................... 238
Comparator Output .................................................. 240
Comparator Voltage Reference ............................... 244
Comparator Voltage Reference
Compare Mode Operation ....................................... 142
Device Clock .............................................................. 29
Enhanced PWM ....................................................... 149
EUSART Receive .................................................... 219
EUSART Transmit ................................................... 216
External Power-on Reset Circuit
Fail-Safe Clock Monitor ........................................... 266
Generic I/O Port ....................................................... 105
High/Low-Voltage Detect with
HSPLL ....................................................................... 25
Interrupt Logic ............................................................ 92
INTOSC and PLL ....................................................... 26
MSSP (I
MSSP (I
MSSP (SPI Mode) ................................................... 161
On-Chip Reset Circuit ................................................ 41
PIC18F2221/2321 ..................................................... 10
PIC18F4221/4321 ..................................................... 11
PORTD and PORTE (Parallel Slave Port) ............... 120
PWM Operation (Simplified) .................................... 144
Reads from Flash Program Memory ......................... 77
Single Comparator ................................................... 239
Table Read Operation ............................................... 73
Table Write Operation ............................................... 74
Table Writes to Flash Program Memory .................... 79
Timer0 in 16-Bit Mode ............................................. 124
Timer0 in 8-Bit Mode ............................................... 124
Timer1 ..................................................................... 128
Timer1 (16-Bit Read/Write Mode) ............................ 128
Timer2 ..................................................................... 134
Timer3 ..................................................................... 136
Timer3 (16-Bit Read/Write Mode) ............................ 136
Watchdog Timer ...................................................... 263
and Receive ............................................................. 221
Detecting ................................................................... 44
Disabling in Sleep Mode ............................................ 44
Software Enabled ...................................................... 44
Output Buffer Example .................................... 245
(Slow V
External Input .................................................. 248
2
2
C Master Mode) ........................................ 189
C Mode) .................................................... 170
DD
Power-up) ........................................ 43
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