PIC18F2221 MICROCHIP [Microchip Technology], PIC18F2221 Datasheet - Page 310

• Manufacturer Part Number: PIC18F2221
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F4321 FAMILY
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
† If WDT causes wake-up, this bit is cleared.
DS39689E-page 308
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TO =
PD =
TO =
PD =
Q1
?
?
1†
0
operation
Enter Sleep mode
None
00h → WDT,
0 → WDT postscaler,
1 → TO,
0 → PD
TO, PD
The Power-Down status bit (PD) is
cleared. The Time-out status bit (TO)
is set. Watchdog Timer and its
postscaler are cleared.
The processor is put into Sleep mode
with the oscillator stopped.
1
1
SLEEP
SLEEP
Q2
0000
No
0000
Process
Data
Q3
0000
Sleep
Go to
Q4
0011
Preliminary
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ‘f’
(W) – (f) – (C) → dest
Subtract register ‘f’ and Carry flag
1
Subtract f from W with Borrow
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
N, OV, C, DC, Z
(borrow) from W (2’s complement
method). If ‘d’ is ‘0’, the result is stored
in W. If ‘d’ is ‘1’, the result is stored in
register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is
selected. If ‘a’ is ‘1’, the BSR is used
to select the GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction
operates in Indexed Literal Offset
Addressing mode whenever
f ≤ 95 (5Fh). See Section 24.2.3
“Byte-Oriented and Bit-Oriented
Instructions in Indexed Literal Offset
Mode” for details.
1
SUBFWB
SUBFWB
SUBFWB
SUBFWB
Read
Q2
0101
3
2
1
FF
2
0
0
1
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
© 2007 Microchip Technology Inc.
; result is negative
; result is positive
; result is zero
01da
REG, 1, 0
REG, 0, 0
REG, 1, 0
f {,d {,a}}
Process
Data
Q3
ffff
destination
Write to
Q4
ffff