PIC18F2221 MICROCHIP [Microchip Technology], PIC18F2221 Datasheet - Page 271

• Manufacturer Part Number: PIC18F2221
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 23-3:
23.5.1
The program memory may be read to or written from
any location using the table read and table write
instructions. The device ID may be read with table
reads. The Configuration registers may be read and
written with the table read and table write instructions.
In normal execution mode, the CPn bits have no direct
effect. CPn bits inhibit external reads and writes. A
block of user memory may be protected from table
writes if the WRTn Configuration bit is ‘0’. The EBTRn
bits control table reads. For a block of user memory
with the EBTRn bit set to ‘0’, a table read instruction
that executes from within that block is allowed to read.
FIGURE 23-6:
© 2007 Microchip Technology Inc.
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
Legend: Shaded cells are unimplemented.
TBLPTR = 0008FFh
File Name
Results: All table writes disabled to Blockn whenever WRTn = 0.
Note 1: See Figure 23-5 for block boundaries.
Register Values
PROGRAM MEMORY
CODE PROTECTION
PC = 00BFFEh
PC = 003FFEh
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
SUMMARY OF CODE PROTECTION REGISTERS
TABLE WRITE (WRTn) DISALLOWED
WRTD
Bit 7
CPD
—
—
—
—
EBTRB
WRTB
Bit 6
CPB
—
—
—
Program Memory
WRTC
Preliminary
Bit 5
Boot Block
—
—
—
—
—
Block 0
TBLWT*
Block 1
TBLWT*
Bit 4
A table read instruction that executes from a location
outside of that block is not allowed to read and will result
in reading ‘0’s. Figures 23-6 through 23-8 illustrate table
write and table read protection.
—
—
—
—
—
—
PIC18F4321 FAMILY
Note:
(1)
Configuration Bit Settings
Bit 3
Code protection bits may only be written to
a ‘0’ from a ‘1’ state. It is not possible to
write a ‘1’ to a bit in the ‘0’ state. Code
protection bits are only set to ‘1’ by a full
chip erase or block erase function. The full
chip erase and block erase functions can
only be initiated via ICSP operation or an
external programmer.
—
—
—
—
—
—
WRTB, EBTRB = 11
WRT0, EBTR0 = 01
WRT1, EBTR1 = 11
Bit 2
—
—
—
—
—
—
EBTR1
WRT1
Bit 1
CP1
DS39689E-page 269
—
—
—
EBTR0
WRT0
Bit 0
CP0
—
—
—