KSZ8842-PMBLAM MICREL [Micrel Semiconductor], KSZ8842-PMBLAM Datasheet - Page 95

• Manufacturer Part Number: KSZ8842-PMBLAM
• Description: 2-Port Ethernet Switch with PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

Micrel, Inc.
Port 2 Reserved (Offset 0x0536 – 0x053A)
This register is reserved.
Host Control Register 1 (Offset 0x0540): P3CR1
This register contains the global per port control for the switch host port function.
October 2007
15 – 0
15 – 8
4 – 3
Bit
Bit
Bit
0
7
6
5
2
1
0
Default
Default
Default
0x0000
0x00
00
0
0
0
0
0
0
0
R/W
R/W
R/W
RO
RW
RW
RW
RW
RW
RW
RW
RO
RO
Description
Partner 10BT half duplex capability
1 = link partner 10Base-T half duplex capable
0 = link partner not 10Base-T half duplex capable
Description
Reserved
Description
Reserved
Broadcast storm protection enable
1 = enable broadcast storm protection for ingress packets on the port
0 = disable broadcast storm protection
Diffserv priority classification enable
1 = enable diffserv priority classification for ingress packets on port
0 = disable diffserv function
802.1p priority classification enable
1 = enable 802.1p priority classification for ingress packets on port
0 = disable 802.1p
Port based priority classification
00 = ingress packets on port 1 will be classified as priority 0 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
01 = ingress packets on port 1 will be classified as priority 1 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
10 = ingress packets on port 1 will be classified as priority 2 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
11 = ingress packets on port 1 will be classified as priority 3 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
Note: “Diffserv”, “802.1p” and port priority can be enabled at the same
time. The OR’ed result of 802.1p and DSCP overwrites the port priority.
Tag insertion
1 = when packets are output on the port, the switch will add 802.1p/q tags
to packets without 802.1p/q tags when received. The switch will not add
tags to packets already tagged. The tag inserted is the ingress port’s “port
VID”.
0 = disable tag insertion
Tag removal
1 = when packets are output on the port, the switch will remove 802.1p/q
tags from packets with 802.1p/q tags when received. The switch will not
modify packets received without tags.
0 = disable tag removal
TX Multiple Queues Select Enable
1 = the port output queue is split into fourpriority queues.
0 = single output queue on the port. There is no priority differentiation
even though packets are classified into high or low priority.
95
Is the same as:
P2ANLPR, bit 5
KSZ8842-PMQL/PMBL
M9999-100207-1.5