KSZ8842-PMBLAM MICREL [Micrel Semiconductor], KSZ8842-PMBLAM Datasheet - Page 87

• Manufacturer Part Number: KSZ8842-PMBLAM
• Description: 2-Port Ethernet Switch with PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

Micrel, Inc.
Port 2 Control Register 3 (Offset 0x0526): P2CR3
This register contains the control register for the switch port 2 function.
Port 2 Ingress Rate Control Register (Offset 0x0528): P2IRCR
This register contains the port 2 ingress rate control register for the switch port 2 function.
October 2007
15 – 12
15 – 5
3 – 2
Bit
Bit
4
1
0
Default
Default
000
0x0
00
0
0
R/W
R/W
RW
RW
RW
RW
RO
Description
Reserved
Ingress Limit Mode
These bits determine what kinds of frames are limited and counted against
Ingress limiting as follows:
00 = Limit and count all frames
01 = Limit and count Broadcast, Multicast, and flooded unicast frames
10 = Limit and count Broadcast and Multicast frames only
11 = Limit and count Broadcast frames only
Count IFG bytes
1 = each frame’s minimum inter frame gap (IFG) bytes (12 per frame) are
included in Ingress and Egress rate limiting calculations.
0 = IFG bytes are not counted
Count Preamble bytes.
1 = each frame’s preamble bytes (8 per frame) are included in Ingress and
Egress rate limiting calculations.
0 = preamble bytes are not counted
Description
Ingress Pri3 Rate
Priority 3 frames will be discarded after the ingress rate selected as shown
below, is reached or exceeded:
0000 = Not limited (Default)
0001 = 64 Kbps
0010 = 128 Kbps
0011 = 256 Kbps
0100 = 512 Kbps
0101 = 1 Mbps
0110 = 2 Mbps
0111 = 4 Mbps
1000 = 8 Mbps
1001 = 16 Mbps
1010 = 32 Mbps
1011 = 48 Mbps
1100 = 64 Mbps
1101 = 72 Mbps
1110 = 80 Mbps
1111 = 88 Mbps
Note: For 10Base-T, rate settings above 10Mbps are set to the default
value 0000 (Not limited).
87
KSZ8842-PMQL/PMBL
M9999-100207-1.5