KSZ8842-PMBLAM MICREL [Micrel Semiconductor], KSZ8842-PMBLAM Datasheet - Page 50
![no-image](/images/no-image-200.jpg)
KSZ8842-PMBLAM
Manufacturer Part Number
KSZ8842-PMBLAM
Description
2-Port Ethernet Switch with PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8842-PMBLAM.pdf
(119 pages)
- Current page: 50 of 119
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Micrel, Inc.
MAC/PHY and Control Registers
MAC Address Register Low (0x0200): MARL
This register along with the other two MAC address registers are loaded starting at word location 0x10 of the EEPROM
upon hardware reset. The register can be modified by the software driver, but will not modify the original MAC address
value in the EEPROM. The MAC address is used to define the individual destination address that the KSZ8842-
PMQL/PMBL host port will respond to when receiving unicast frames. This MAC address will become the source
address when sending unicast frames from the host port to port-1 or port-2. Network addresses are generally
expressed in the form of 01:23:45:67:89:AB, where the bytes are received from left to right, and the bits within each
byte are received right to left (LSB to MSB). The actual transmitted and received bits are in the order of 10000000
11000100 10100010 11100110 10010001 11010101.
The following table shows the register bit fields for low word of MAC address.
MAC Address Register Middle (0x0202): MARM
This register along with the other two MAC address registers are loaded starting at word location 0x10 of the EEPROM
upon hardware reset. The register can be modified by the software driver, but will not modify the original MAC address
value in the EEPROM. MAC address is used to define the individual destination address the KSZ8842-PMQL/PMBL will
respond to when receiving frames. Network addresses are generally expressed in the form of 01:23:45:67:89:AB,
where the bytes are received from left to right, and the bits within each byte are received right to left (LSB to MSB). The
actual transmitted and received bits are in the order of 10000000 11000100 10100010 11100110 10010001 11010101.
The following table shows the register bit fields.
MAC Address Register High (0x0204): MARH
This register along with the other two MAC address registers are loaded starting at word location 0x10 of the EEPROM
upon hardware reset. The register can be modified by software driver, but will not modify the original MAC address
value in the EEPROM. MAC address is used to define the individual destination address the KSZ8842-PMQL/PMBL will
October 2007
15 – 0
15 – 0
Bit
Bit
ADD MAC High 10
ADD MAC High 11
ADD MAC High 12
ADD MAC High 13
ADD MAC High 14
ADD MAC High 15
ADD MAC Low 10
ADD MAC Low 11
ADD MAC Low 12
ADD MAC Low 13
ADD MAC Low 14
ADD MAC Low 15
ADD MAC High 9
ADD MAC Low 9
Register
Default
Default
–
–
R/W
R/W
RW
RW
IDENTIFIER
MAAH10
MAAH11
MAAH12
MAAH13
MAAH14
MAAH15
MAAL10
MAAL11
MAAL12
MAAL13
MAAL14
MAAL15
MAAH9
MAAL9
Description
MARL MAC Address Low
The least significant word of the MAC address
Description
MARM MAC Address Middle
The middle word of the MAC address
50
OFFSET
0x00CC
0x00DC
0x00EC
0x00FC
0x00C8
0x00D0
0x00D4
0x00D8
0x00E0
0x00E4
0x00E8
0x00F0
0x00F4
0x00F8
KSZ8842-PMQL/PMBL
M9999-100207-1.5
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