KSZ8842-PMBLAM MICREL [Micrel Semiconductor], KSZ8842-PMBLAM Datasheet - Page 64
![no-image](/images/no-image-200.jpg)
KSZ8842-PMBLAM
Manufacturer Part Number
KSZ8842-PMBLAM
Description
2-Port Ethernet Switch with PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8842-PMBLAM.pdf
(119 pages)
- Current page: 64 of 119
- Download datasheet (961Kb)
Micrel, Inc.
Indirect Access Control Register (Offset 0x04A0): IACR
This register contains the indirect control for the switch function.
Indirect Access Data Register 1 (Offset 0x04A2): IADR1
This register contains the indirect data for the switch function.
Indirect Access Data Register 2 (Offset 0x04A4): IADR2
This register contains the indirect data for the switch function.
Indirect Access Data Register 3 (Offset 0x04A6): IADR3
This register contains the indirect data for the switch function.
Indirect Access Data Register 4 (Offset 0x04A8): IADR4
This register contains the indirect data for the switch function.
October 2007
Note: (1) write IACR will actually trigger a command.
Read or write access is determined by Register bit 12.
15 – 13
15 – 8
15 – 0
15 – 0
15 – 0
11:10
9 – 0
6 – 3
2 – 0
Bit
Bit
Bit
Bit
Bit
12
7
Default
Default
Default
Default
Default
0x0000
0x0000
0x0000
0x000
0x000
000
0x0
000
00
0
0
R/W
R/W
R/W
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
Description
Reserved
Read High. Write Low
1 = read cycle
0 = write cycle
Table select
00 = static MAC address table selected
01 = VLAN table selected
10 = dynamic address table selected
11 = MIB counter selected
Indirect address
Bit 9-0 of indirect address
Description
Reserved
CPU Read Status
Only for dynamic and statistics counter reads.
1 = read is still in progress
0 = read has completed
Reserved
Indirect data.
Bit 66-64 of indirect data
Description
Indirect data
Bit 47-32 of indirect data
Description
Indirect data
Bit 63-48 of indirect data
Description
Indirect data
Bit 15-0 of indirect data
64
KSZ8842-PMQL/PMBL
M9999-100207-1.5
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