KSZ8842-PMBLAM MICREL [Micrel Semiconductor], KSZ8842-PMBLAM Datasheet - Page 16
![no-image](/images/no-image-200.jpg)
KSZ8842-PMBLAM
Manufacturer Part Number
KSZ8842-PMBLAM
Description
2-Port Ethernet Switch with PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8842-PMBLAM.pdf
(119 pages)
- Current page: 16 of 119
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Micrel, Inc.
Balls Description of KSZ8842-PMBL
October 2007
A8
C7
B7
A7
C6
B6
A6
B5
A5
Ball
Number
TEST_EN
SCAN_EN
P1LED2
P1LED1
P1LED0
P2LED2
P2LED1
P2LED0
PCLK
Ball
Name
I
I
Opu
Opu
Opu
Opu
Opu
Opu
Ipd
Type
Test Enable.
For normal operation, pull-down this pin to ground.
Scan Test Scan Mux Enable.
For normal operation, pull-down this pin to ground.
Port 1 and Port 2 LED indicators
Notes:
1. Link = On; Activity = Blink; Link/Act = On/Blink; Full Dup/Col = On/Blink;
Full Duplex = On (Full duplex); Off (Half duplex)
Speed = On (100BASE-T); Off (10BASE-T)
2. P1LED3 is ball B3. P2LED3 is ball C3.
Port 1 and Port 2 LED indicators
Note 3: RPT_COL = Blink; RPT_Link3/RX (Host port) = On/Blink;
RPT_Link2/RX (Port 2) = On/Blink; RPT_Link1/RX (Port 1) = On/Blink;
RPT_ACT = On if any activity; RPT_ERR3 (Host port) = On if any CRC error;
RPT_ERR2 (port 2) = On if any CRC error; RPT_ERR1 (port 1) = On if any CRC error;
PCI Bus Clock. This Clock provides the timing for all PCI bus phases. The rising edge
P1LED3
P1LED2/P2LED2
P1LED1/P2LED1
P1LED0/P2LED0
P1LED3
P1LED2/P2LED2
P1LED1/P2LED1
P1LED0/P2LED0
P1LED3 , P2LED3
P1LED2, P2LED2
P1LED1, P2LED1
P1LED0, P2LED0
Ball Function
2
2
/P2LED3
P2LED3
16
Switch Global Control Register 5:
SGCR5 bit [15,9]
[0,0] Default
—
Link/Act
Full duplex/Col
Speed
Reg. SGCR5 bit [15,9]
[1,0]
Act
Link
Full duplex/Col
Speed
Switch Global Control Register 5: SGCR5 bit [15,9]
[0,0] Default
RPT_COL, RPT_ACT
RPT_Link3/RX, RPT_ERR3
RPT_Link2/RX, RPT_ERR2
RPT_Link1/RX, RPT_ERR1
1
3
defined as follows:
for Repeater mode defined as follows:
100Link/Act
Full duplex
[0,1]
—
10Link/Act
[1,1]
—
—
—
—
[0,1] [1,0] [1,1]
—
—
—
—
KSZ8842-PMQL/PMBL
M9999-100207-1.5
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