XCV405E-7BG556I XILINX [Xilinx, Inc], XCV405E-7BG556I Datasheet - Page 60

no-image

XCV405E-7BG556I

Manufacturer Part Number
XCV405E-7BG556I
Description
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
Virtex™-E 1.8 V Extended Memory Field Programmable Gate Arrays
IOB Input Switching Characteristics Standard Adjustments
I
Module 3 of 4
6
Notes:
1.
Data Input Delay Adjustments
Standard-specific data input delay
adjustments
Input timing i for LVTTL is measured at 1.4 V. For other I/O standards, see
Figure 1: Virtex-E Input/Output Block (IOB)
T
TCE
O
OCE
IQ
SR
CLK
ICE
I
Description
D
CE
D
CE
Q
SR
SR
SR
CE
Q
Q
D
Programmable
Delay
OBUFT
IBUF
Vref
T
T
T
T
T
ILVCMOS18
T
Symbol
ILVCMOS2
T
T
Keeper
T
IGTLPLUS
Weak
T
T
IPCI33_3
IPCI66_3
ILVPECL
T
T
T
ISSTL2
ISSTL3
ILVTTL
IHSTL
ILVDS
IGTL
ICTT
IAGP
ds022_02_091300
PAD
www.xilinx.com
1-800-255-7778
PCI, 33 MHz, 3.3 V
PCI, 66 MHz, 3.3 V
LVCMOS18
LVCMOS2
Standard
LVPECL
SSTL2
SSTL3
LVTTL
LVDS
GTL+
HSTL
AGP
GTL
CTT
Table
3.
–0.02
–0.02
–0.05
–0.05
+0.10
+0.06
+0.02
–0.04
–0.02
+0.01
–0.03
0.00
0.00
Min
0.0
Speed Grade
+0.20
+0.15
+0.15
+0.08
–0.11
+0.14
+0.14
+0.04
+0.04
+0.04
+0.10
+0.04
0.0
0.0
-8
DS025-3 (v2.2) July 17, 2002
+0.20
+0.15
+0.15
+0.08
–0.11
+0.14
+0.14
+0.04
+0.04
+0.04
+0.10
+0.04
0.0
0.0
-7
(1)
+0.20
+0.15
+0.15
+0.08
–0.11
+0.14
+0.14
+0.04
+0.04
+0.04
+0.10
+0.04
0.0
0.0
-6
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R

Related parts for XCV405E-7BG556I