LM12434CIWM NSC [National Semiconductor], LM12434CIWM Datasheet - Page 6

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LM12434CIWM

Manufacturer Part Number
LM12434CIWM
Description
Sign Data Acquisition System with Serial I/O and Self-Calibration
Manufacturer
NSC [National Semiconductor]
Datasheet
DNL
V
V
V
V
PSS
C
C
t
t
Symbol
IN
IN
IN
IN
REF
IN
C
A
2 0 Electrical Specifications
2 2 1 Converter Static Characteristics The following specifications apply to the LM12434 and LM12 L 438 for V
V
8 0 MHz 6 MHz
T
2 2 2 Converter Dynamic Characteristics The following specifications apply only to the LM12434 and LM12438 for V
V
throughput rate
2 048V 1 25V common-mode voltage and minimum acquisition time unless otherwise specified Boldface limits apply
for T
Symbol
1 25V common-mode voltage and minimum acquisition time unless otherwise specified Boldface limits apply for T
D
J
a
b
a
a
D
a
a
e
b
b
2
e
A
e
T
V
V
MIN
IN
IN
e
5V 3 3V
5V AGND
b
b
T
CLK Duty Cycle
Conversion Time
Acquisition Time
(Programmable)
J
to T
8-Bit
Differential Non-Linearity
8-Bit
Zero Error
8-Bit
and Negative Full-Scale Error
8-Bit
DC Common Mode Error
Multiplexer Channel-to-Channel
Matching
Non-Inverting
Input Range
Inverting
Input Range
Differential Input Voltage Range
Common Mode Input Voltage Range
Power Supply
Sensitivity
(Note 15)
V
Selected Multiplexer Channel Input
Capacitance
e
Parameter
REF
e
MAX
T
MIN
a
a
a
a
a
133 3 kHz R
AGND
R
e
S
Sign and ‘‘Watchdog’’ Mode
Sign and ‘‘Watchdog’’ Mode
Sign and ‘‘Watchdog’’ Positive
Sign and ‘‘Watchdog’’ Mode
V
all other limits T
to T
REF
DGND
e
e
25
b
MAX
Parameter
Input Capacitance
DGND
e
S
13-Bit Resolution
Sequencer State S5 (Figure 10)
9-Bit Resolution
Sequencer State S5 (Figure 10)
Sequencer State S7 (Figure 10)
Minimum for 13-Bits
Maximum for 13-Bits (D
Minimum for 9-Bits (Figure 10)
Maximum for 9-Bits (D
source impedance for V
all other limits T
e
0V V
e
25
A
0V V
Full-Scale Error V
REF
e
Linearity Error
Conditions
source impedance for V
a
T
Zero Error V
J
REF
(Continued)
e
e
a
4 096V V
A
25 C (Notes 6 7 8 and 9) (Continued)
e
e
e
4 096V 2 5V
T
e
J
After Auto-Zero
REF
15)
e
A
REF
15)
REF
a
25 C (Notes 6 7 8 and 9)
a
6
a
e
b
and V
e
V
e
D
REF
(Note 10)
4 096V V
44 (t
21 (t
39 (t
a
Conditions
Typical
9 (t
2 (t
2 (t
0V 12-bit
REF
V
e
a
50
CLK
CLK
CLK
REF
CLK
CLK
CLK
5V
and V
b
)
)
)
b
)
)
)
s
g
REF
e
10%
REF
25
a
b
0V 12-bit
44 (t
21 (t
39 (t
32 (t
9 (t
2 (t
b
e
sign conversion mode f
fully-differential input with fixed 2 048V
s
GND
CLK
CLK
CLK
CLK
CLK
CLK
(Note 11)
25
Limits
40
60
)
)
a
)
)
)
)
a
a
a
a
a
a
(Note 10) (Note 11)
fully-differential input with fixed
Typical
sign conversion mode f
g
g
g
g
g
50 ns
50 ns
g
g
g
50 ns
50 ns
50 ns
50 ns
85
75
0 15
0 05
0 05
0 05
0 25
1 8
0 1
0 2
b
Limits
g
g
g
g
g
t
GND
GND
GND
V
V
V
V
CLK
CLK
V
1 2
1 2
1 2
A
A
A
A
1 0
1 5
A
a
a
a
a
a
e
% (max)
% (min)
e
(Limit)
Units
(max)
(max)
(max)
(max)
(max)
(max)
CLK Period
%
8 0 MHz
LSB (max)
LSB (max)
LSB (max)
LSB (max)
LSB (max)
V (max)
V (max)
V (max)
V (max)
CLK
A
(Limit)
V (min)
V (min)
V (min)
V (min)
A
Units
a
LSB
LSB
LSB
a
A
pF
pF
e
e
e
e

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