LM12434CIWM NSC [National Semiconductor], LM12434CIWM Datasheet - Page 14

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LM12434CIWM

Manufacturer Part Number
LM12434CIWM
Description
Sign Data Acquisition System with Serial I/O and Self-Calibration
Manufacturer
NSC [National Semiconductor]
Datasheet
2 0 Electrical Specifications
2 4 NOTES ON SPECIFICATIONS
Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is
functional but do not guarantee specific performance limits For guaranteed specifications and test conditions see the Electrical Characteristics The guaranteed
specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not operated under the listed test
conditions
Note 2 All voltages are measured with respect to GND unless otherwise specified GND specifies either AGND and or DGND and V
or V
Note 3 When the input voltage (V
5 mA The 20 mA maximum package input current rating allows the voltage at any four pins with an input current of 5 mA to simultaneously exceed the power
supply voltages
Note 4 The maximum power dissipation must be derated at elevated temperatures and is dictated by T
junction to ambient thermal resistance) and T
package when board mounted is 70 C W and in the WM package when board mounted is 60 C W
Note 5 Human body model 100 pF discharged through a 1 5 k
Note 6 Two on-chip diodes are tied to each analog input through a series resistor as shown below Input voltage magnitude up to 5V above V
GND will not damage the part However errors in the A D conversion can occur if these diodes are forward biased by more than 100 mV As an example if V
4 5 V
Note 7 V
conversion comparison accuracy Refer to Section 8 0 for a detailed discussion on grounding the DAS
Note 8 Accuracy is guaranteed when operating the LM12434 LM12 L 438 at f
Note 9 With the test condition for V
Note 10 Typicals are at T
Note 11 Limits are guaranteed to National’s AOQL (Average Output Quality Level)
Note 12 Positive integral linearity error is defined as the deviation of the analog value expressed in LSBs from the straight line that passes through positive full-
scale and zero For negative integral linearity error the straight line passes through negative full-scale and zero (See Figures 5b and 5c )
Note 13 Zero error is a measure of the deviation from the mid-scale voltage (a code of zero) expressed in LSB It is the average value of the code transitions
between
Note 14 The DC common-mode error is measured with both the inverted and non-inverted inputs shorted together and driven from 0V to 5V 3 3V
measured value is referred to the resulting output value when the inputs are driven with a 2 5V 1 65V signal
Note 15 Power Supply Sensitivity is measured after Auto-Zero and or Auto-Calibration cycle has been completed with V
Note 16 V
Note 17 The device self-calibration technique ensures linearity and offset errors as specified but noise inherent in the self-calibration process will result in a
repeatability uncertainty of
Note 18 The Throughput Rate is for a single instruction repeated continuously while reading data during conversions with a serial clock frequency f
conversion The Throughput Rate is f
Note 19 See AN-450 ‘‘Surface Mounting Methods and their Effect on Product Reliability’’ for other methods of soldering surface mount devices
Note 20 Each input referenced to the other input sees a
done by applying two sine waves with 180 phase shift and 4 096 V
Note 21 Multiplexer channel-to-channel crosstalk is measured by placing a sinewave with a frequency of f
frequency of f
generated by doing a FFT on these samples The crosstalk is then calculated by subtracting the amplitude of the frequency component at 40 kHz from the
amplitude of the fundamental frequency at 5 kHz
Note 22 Interrupt 7 is set to return an out-of-standby flag 10 ms (typ) after the device is requested to come out of standby mode However characterization has
shown the devices will perform to their rated specifications in 2 ms
8 MHz
JA
D
or the number given in the Absolute Maximum Ratings whichever is lower For this device T
DC
a
the full-scale input voltage must be
b
Sequencer states 0 (1 clock cycle) 1 (1 clock cycle) 7 (9 clock cycles) and 5 (44 clock cycles) are used (see Figure 10 ) for a total of 56 clock cycles per
A
REFCM
1 to 0 and 0 to
a
CROSSTALK
and V
(Reference Voltage Common Mode Range) is defined as (V
D
a
must be connected together to the same power supply voltage and bypassed with separate capacitors at each V
A
e
g
a
e
0 10 LSB
40 kHz on the remaining channels 8192 conversions are performed on the channel with the 5 kHz signal A special response is
1 (see Figure 6 )
25 C and represent most likely parametric norm
IN
) at any pin exceeds the power supply rails (V
REF
CLK
(V
(MHz) N where N is the number of clock cycles conversion
REF
s
A
a
4 6 V
(ambient temperature) The maximum allowable power dissipation at any temperature is PD
b
DC
V
REF
to ensure accurate conversions
g
b
4 096V (8 192 V
(Continued)
) given as
resistor
p-p
a
(between GND and V
4 096V the 12-bit LSB is 1 mV and the 8-bit ‘‘Watchdog’’ LSB is 19 mV
p-p
) sine wave However the voltage at each input stays within the supply rails This is
REF
14
CLK
IN k
a
e
a
GND or V
8 MHz 6 MHz
V
REF
A
b
a
) 2 See Figures 3 and 4
) to the inputs
IN l
Jmax
e
(V
A
IN
150 C and the typical thermal resistance (
a
Jmax
e
or V
5 kHz on one channel and another sinewave with a
TL H 11879 – 5
(maximum junction temperature)
D
a
)) the current at that pin should be limited to
A
a
and V
D
a
a
specifies either V
at the specified extremes
max
e
a
A
SCLK
(T
a
pin to assure
Jmax
JA
or 5V below
JA
e
(package
) of the V
A
10 MHz
a
b
A
and
T
a
The
A
)
is

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