LM12434CIWM NSC [National Semiconductor], LM12434CIWM Datasheet - Page 24

no-image

LM12434CIWM

Manufacturer Part Number
LM12434CIWM
Description
Sign Data Acquisition System with Serial I/O and Self-Calibration
Manufacturer
NSC [National Semiconductor]
Datasheet
LM12434 Pin Description
PLCC
Pkg
5 0 Pin Descriptions
Pin Number
20
21
22
23
24
25
26
27
28
6
7
8
9
Pkg
SO
26
27
28
12
13
14
15
1
2
3
4
5
6
P2
P1
MODESEL2
MODESEL1
CLK
INT
SYNC
STANDBYOUT
V
MUXOUT
MUXOUT
S H IN
S H IN
D
Pin Name
a
b
a
b
a
(Continued)
TABLE I LM12 L 438 Pin Description (Continued)
Serial interface input
Serial interface input
Serial mode selection inputs The logic states of these inputs determine the operation of
the serial mode as shown below The standard mode covers the National’s MICROWIRE
Motorola’s SPI and Hitachi’s SCl protocols
MODESEL1 MODESEL2
The device main clock input The operating range of clock frequency is 0 05 MHz to
10 0 MHz The device accuracy is guaranteed only for the clock frequencies indicated in
the specification tables
Interrupt output This is an active low output An interrupt is generated any time a non-
masked interrupt condition takes place There are seven different conditions that can
generate an interrupt (Refer to Section 6 2 4) The interrupt is set high (inactive) by reading
the interrupt status register This output can drive up to 100 pF of capacitive loads An
external buffer should be used for driving higher capacitive loads
Synchronization input output SYNC is an input if the Configuration Register’s SYNC I O bit
is ‘‘0’’ and output when the bit is ‘‘1’’ When sync is an input a rising edge on this pin
causes the internal S H to hold the input signal and a conversion cycle or a comparison
cycle (depending on the programmed instruction) to be started (The conversion or
comparison actually begins on the rising edge of the CLK immediately following the rising
edge of sync ) When output it goes high at the start of a conversion or a comparison cycle
and returns low when the cycle is completed At power up the SYNC pin is set as an input
When used as an output it can drive up to 100 pF of capacitive loads An external buffer
should be used for driving higher capacitive loads
Stand-by output This is an active low output STANDBYOUT will be activated when the
LM12 L 438 is put into stand-by mode through the Configuration Register’s stand-by bit It
is used to force any other devices in the system (signal conditioning circuitry for example)
to go into power-down mode This is done by connecting the ‘‘shutdown’’ ‘‘powerdown’’
‘‘standby’’ etc pins of the other ICs to STANDBYOUT In those cases where the peripheral
ICs do not have the power-down inputs STANDBYOUT can be used to turn off their power
through an electronic switch Note that the logic polarity of the STANDBYOUT is the
opposite to that of the stand-by bit in the Configuration Register
Digital supply See above definition
LM12434 Pin Description (Same as LM12 L 438 with the exceptions of the following pins )
Multiplexer outputs These are the LM12434’s externally available analog MUX output pins
Analog inputs are directed to these outputs based on the Instruction RAM programming
Sample-and-hold inputs These are the inverting and non-inverting inputs of the sample-
and-hold LM12434 allows external analog signal conditioning circuits to be placed
between MUX outputs and S H inputs
(Same As LM12 L 438 with the exception of the following pins )
24
Standard
8051
I
TMS320
Standard
8051
I
TMS320
01
00
10
11
2
2
C
C
Description
CS
1
SAD1
FSX
R F (Clock rise fall)
1
SAD0
FSR
Standard mode
8051
I
TMS320
2
C

Related parts for LM12434CIWM