DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 39

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DS80C320-ECD

Manufacturer Part Number
DS80C320-ECD
Description
High-Speed Microcontroller User Guide
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
Serial Port Control (SCON1)
SFR C0h
SM0-2
Bits 7-5
SM0/FE_1
Bit 7
SM1_1
Bit 6
SM2-2
Bit 5
SM0
0
0
0
1
1
1
1
SM1
0
0
1
0
0
1
1
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
SM0/FE_1
RW-0
SM2
7
X
0
1
0
1
0
1
Serial Port 1 Mode. These bits control the mode of serial port 1 as shown
below. In addition, the SM0 and SM2 bits have secondary functions as Shown
below.
Framing Error Flag. When SMOD0 (PCON.6)=0, this bit (SM0) is used to
select the mode for serial port 1. When SMOD0 (PCON.6)=1, this bit (FE) will
be set upon detection of an invalid stop bit. When used as FE, this bit must be
cleared in software. Once the SMOD0 bit is set, modifications to this bit will
not affect the serial port mode settings. Although accessed from the same
register, internally the data for bits SM0 and FE are stored in different locations.
No alternate function.
Multiple CPU Communications. The function of this bit is dependent on the
serial port 1 mode.
Mode 0: Selects 12 t
Mode 1: When this bit is set, reception is ignored (RI_1) is not set) if invalid
stop bit received.
Mode 2/3: when this bit is set, multiprocessor communications are enabled in
mode 2 and 3. This will prevent RI_1 from being set, and an interrupt being
asserted, if the 9
MODE
SM1_1
RW-0
0
0
1
2
2
3
3
6
Synchronous
Synchronous
Asynchronous
Asynchronous
Asynchronous w/ Multiprocessor
communication
Asynchronous
Asynchronous w/ Multiprocessor
communication
SM2_1
RW-0
th
5
bit received is not 1.
CLK
FUNCTION
39 of 175
or 4t
REN_1
RW-0
4
CLK
period for synchronous port 1 data transfers.
TB8_1
RW-0
3
High-Speed Microcontroller User’s Guide
RB8_1
8 bits
8 bits
10 bits
11 bits
11 bits
11 bits
11 bits
LENGTH
RW-0
2
RW-0
12t
4t
Timer 1 baud rate
equation
64t
32t
64t
32t
Timer 1 baud rate
equation
Timer 1 baud rate
equation
TI_1
CLK
1
CLK
CLK
CLK
CLK
CLK
PERIOD
(SMOD=0)
(SMOD=0)
(SMOD=1)
(SMOD=1)
RW-0
RI_1
0

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