DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 148
DS80C320-ECD
Manufacturer Part Number
DS80C320-ECD
Description
High-Speed Microcontroller User Guide
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
1.DS80C320-ECD.pdf
(175 pages)
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High-Speed Microcontroller User’s Guide
Mode 2
This mode uses a total of 11 bits in asynchronous full duplex communication as illustrated in Figure 12-3.
The 11 bits consist of one start bit (a logic 0), 8 data bits, a programmable 9th bit, and one stop bit (a
logic 1). Like Mode 1, the transmissions occur on the TXD signal pin and receptions on RXD. For
th
transmission purposes, the 9
bit can be stuffed as a logic 0 or 1. A common use is to put the parity bit in
th
this location. The 9
bit is transferred from the TB8 bit position in the SCON register (SCON0.3 or
SCON1.3) during the write to SBUF. Baud rates are generated as a fixed function of the crystal
frequency as described above. Like Mode 1, Mode 2’s transmission begins 5 oscillator cycles after the
first rollover of the divide by 16 counter following a software write to SBUF. It begins by the start bit
th
being placed on the TXD pin. The data is then shifted out onto the pin LSb first, followed by the 9
bit,
and finally the stop bit. The TI bit (SCON0.1 or SCON1.1) is set when the stop bit is placed on the pin.
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