DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 22

• Manufacturer Part Number: DS80C320-ECD
• Description: High-Speed Microcontroller User Guide
• Manufacturer: DALLAS [Dallas Semiconductor]

Timer/Counter Control (TCON)
SFR 88h
TF1
Bit 7
TR1
Bit 6
TF0
Bit 5
TR0
Bit 4
IE1
Bit 3
IT1
Bit 2
IE0
Bit 1
IT0
Bit 0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
RW-0
TF1
7
Timer 1 Overflow Flag.
maximum count as defined by the current mode. This bit can be cleared by
software and is automatically cleared when the CPU vectors to the Timer
1 interrupt service routine.
0 = No Timer 1 overflow has been detected.
1 = Timer 1 has overflowed its maximum count.
Timer 1 Run Control. This bit enables/disables the operation of Timer 1.
0 = Timer 1 is halted.
1 = Timer 1 is enabled.
Timer 0 Overflow Flag.
maximum count as defined by the current mode. This bit can be cleared by
software and is automatically cleared when the CPU vectors to the Timer 0
interrupt service routine or by software.
0 = No Timer 0 overflow has been detected.
1 = Timer 0 has overflowed its maximum count.
Timer 0 Run Control. This bit enables/disables the operation of Timer 0.
0 = Timer 0 is halted.
1 = Timer 0 is enabled.
Interrupt 1 Edge Detect. This bit is set when an edge/level of the type defined
by IT1 is detected. If IT1=1, this bit will remain set until cleared in software or
the start of the External Interrupt 1 service routine. If IT1=0, this bit will
inversely reflect the state of the
Interrupt 1 Type Select. This bit selects whether the
or level triggered interrupts.
0 =
1 =
Interrupt 0 Edge Detect. This bit is set when an edge/level of the type defined
by IT0 is detected. If IT0=1, this bit will remain set until cleared in software or
the start of the External Interrupt 0 service routine. If IT0=0, this bit will
inversely reflect the state of the
Interrupt 0 Type Select. This bit selects whether the
or level triggered interrupts.
0 =
1 =
RW-0
TR1
6
INT1
INT1
INT0
INT0
is level triggered.
is edge triggered.
is level triggered.
is edge triggered.
RW-0
TF0
5
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RW-0
TR0
4
This bit indicates when Timer 1 overflows its
This bit indicates when Timer 0 overflows its
INT1
INT0
pin.
pin
RW-0
IE1
3
High-Speed Microcontroller User’s Guide
RW-0
IT1
2
INT1
INT0
pin will detect edge
pin will detect edge
RW-0
IE0
1
RW-0
IT0
0