DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 28

• Manufacturer Part Number: DS80C320-ECD
• Description: High-Speed Microcontroller User Guide
• Manufacturer: DALLAS [Dallas Semiconductor]

External Interrupt Flag (EXIF)
SFR 91h
IE5
Bit 7
IE4
Bit 6
IE3
Bit 5
IE2
Bit 4
XT/
Bit 3
RGMD
Bit 2
R=Unrestricted Read, W=Unrestricted Write, T=Timed Access Write Only-n=Value after Reset,
RG
RW-0
IE5
7
External Interrupt 5 Flag. This bit will be set when a falling edge is detected
on
software will cause an interrupt if enabled.
External Interrupt 4 Flag. This bit will be set when a rising edge is detected on
INT4. This bit must be cleared manually by software. Setting this bit in software
will cause an interrupt if enabled.
External Interrupt 3 Flag. This bit will be set when a falling edge is detected
on
software will cause an interrupt if enabled.
External Interrupt 2 Flag. This bit will be set when a rising edge is detected on
INT2. This bit must be cleared manually by software. Setting this bit in software
will cause an interrupt if enabled.
Crystal/Ring Source Select.
oscillator as the desired clock source. This bit will be the inverse of RGMD
except during the crystal warm-up period when executing a ring oscillator
resume from Stop. XTUP (STATUS.4) must be set to 1 and XTOFF (PMR.3)
must be cleared to 0 before this bit can be set. Attempts to modify this bit when
these conditions are not met will be ignored. This bit must be cleared before
XTOFF can be set to 1. This bit is set to 1 after a power-on reset, and unchanged
by all other forms of reset. This bit is not used on the DS80C310 or DS80C320
and will be 1 when read.
0 = The ring oscillator is selected as the clock source. This setting is unaffected
by XTUP (STATUS.4) and XTOFF (PMR.3).
1 = The crystal oscillator is selected as the clock source. This setting is invalid
unless XTUP=1 and XTOFF=0.
Ring Mode Status. This bit indicates the current clock source for the
0 = Device is operating from the external crystal or oscillator.
1 = Device is operating from the ring oscillator.
device. This bit is cleared to 0 after a power-on reset, and unchanged by all
other forms of reset. The state of this bit will be undefined on devices which
do not incorporate a ring oscillator.
RW-0
IE4
INT5
INT3
6
. This bit must be cleared manually by software. Setting this bit in
. This bit must be cleared manually by software. Setting this bit in
RW-0
IE3
5
*=See description
28 of 175
RW-0
IE2
4
This bit selects the crystal oscillator or ring
XT/
RW-*
3
RG
High-Speed Microcontroller User’s Guide
RGMD
R-*
2
RGSL
RW-*
1
RT-0
BGS
0