DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 142

• Manufacturer Part Number: DS80C320-ECD
• Description: High-Speed Microcontroller User Guide
• Manufacturer: DALLAS [Dallas Semiconductor]

SCON1.1
SCON1.0
Initialization:
Read/Write Access:
POWER CONTROL
PCON.7
PCON.6
WATCHDOG CONTROL
WDCON.7
TIMER TWO CONTROL
T2CON.5
TI_1 - Flag that indicates the transmitted word has been completely
shifted out. In mode 0, TI is set at the end of the eighth data bit. In
all other modes, this bit is set at the end of the last data bit. It must
be cleared manually by software.
RI_1 - Flag that indicates a serial word has been received. In mode
0, RI_1 is set at the end of the eighth bit. In mode 1, it is set after the
last sample of the incoming stop bit subject to the state of SM2_1.
In modes 2 and 3, RI_1 is set after the last sample of RB8_1. It must
be cleared manually by software.
SM0
0
0
1
1
SCON1 is set to 00h on a reset.
Unrestricted.
PCON; 87h
SMOD_0. - Doubles the serial baud rate in modes 1, 2, and 3 for
Serial Port 0 (the standard port) when SMOD = 1.
SMOD0 - Framing Error Detection Enable. When SMOD0 is set to a one,
SCON0.7 and SCON1.7 are converted to the FE flag for the respective serial port.
When SMOD0 is 0, then SCON0.7 and SCON1.7 are the SM0 function as
defined for the serial port.
WDCON; D8h
SMOD_1 - Serial Modification. When set to a logic 1, this bit
doubles the baud rate of Serial Port 1. It works identically to
PCON.7.
T2CON; C8h
RCLK - Receive Clock Flag. This bit determines whether Timer 1
or 2 is used for Serial Port 0 timing of received data in Serial Modes
1 or 3. RCLK = 1 causes Timer 2 overflow to be used as the receive
clock. RCLK = 0 causes Timer 1 overflow to be used as the receive
clock.
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SM1
0
1
0
1
Mode
0
1
2
3
Function
Sync
Asynch
Asynch
Asynch
High-Speed Microcontroller User’s Guide
Length
8 bits
10 bits
11 bits
11 bits
4/12 t
(see SM2)
Timer 1
64/32 t
Timer 1
Period
CLK
CLK